SNOSDF9B July 2023 – March 2024 LMG2100R044
PRODUCTION DATA
| PIN | I/O(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| NC | 1–4, 8, 9, 16 | — | Not connected internally. Leave floating. |
| SW | 5 | P | Switching node. Internally connected to HS pin. |
| PGND | 6, 17 | G | Power ground. Low-side GaN FET source. Internally connected to low-side GaN FET source. |
| VIN | 7 | P | Input voltage pin. Internally connected to high-side GaN FET drain. |
| HB | 10 | P | High-side gate driver bootstrap rail. Connect bypass capacitor to HS. |
| HS | 11 | P | High-side GaN FET source connection. |
| HI | 12 | I | High-side gate driver control input. |
| LI | 13 | I | Low-side gate driver control input. |
| VCC | 14 | P | 5V device power supply. |
| AGND | 15 | G | Analog ground. Internally connected to low-side GaN FET source. |