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ZHCSH36 September 2017 LM73605 , LM73606

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

RNP|30
- MPQF448C

散熱焊盤機械數據 (封裝 | 引腳)

RNP|30
- QFND665

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range of –40°C to +125°C (unless otherwise noted)⁽¹⁾

	PARAMETER	MIN	MAX	UNIT
Input voltages	PVIN to PGND	–0.3	42	V
	EN to AGND	–0.3	V_IN + 0.3
	FB, RT, SS/TRK to AGND	–0.3	5
	PGOOD to AGND	–0.1	20
	SYNC to AGND	–0.3	5.5
	BIAS to AGND	–0.3	Lower of (V_IN + 0.3) or 20
	AGND to PGND	–0.3	0.3
Output voltages	SW to PGND	–0.3	V_IN + 0.3	V
	SW to PGND less than 10-ns transients	–3.5	42
	CBOOT to SW	–0.3	5
	VCC to AGND	–0.3	5
Operating junction temperature, T_J		–40	150	°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±750	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

Over operating free-air temperature range of –40°C to +125°C (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Input voltages	PVIN to PGND	3.5	36	V
	EN	0	V_IN
	FB	0	4.5
	PGOOD	0	18
	BIAS input not used	0	0.3
	BIAS input used	0	Lower of (V_IN + 0.3) or 18
	AGND to PGND	–0.1	0.1
Output voltage	V_OUT	1	95% of V_IN	V
Output current	I_OUT, LM73605	0	5	A
Output current	I_OUT, LM73606	0	6	A
Temperature	Operating junction temperature, T_J	–40	125	°C

(1) Recommended operating rating indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Electrical Characteristics

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM73605/LM73606	UNIT
		RNP (WQFN)
		30 PINS
R_θJA	Junction-to-ambient thermal resistance	34.3	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	14.6	°C/W
R_θJB	Junction-to-board thermal resistance	7.3	°C/W
ψ_JT	Junction-to-top characterization parameter	0.1	°C/W
ψ_JB	Junction-to-board characterization parameter	7.1	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	1	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature (T_J) range of –40°C to +125°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at T_J = 25°C, and are provided for reference purposes only. Unless otherwise stated, V_IN = 12 V.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE (PVIN PINS)
V_IN	Operating input voltage range		3.5		36	V
I_SD	Shutdown quiescent current; measured at VIN pin⁽¹⁾	V_EN= 0 V T_J = 25℃		0.8	10	µA
I_{Q_NONSW}	Operating quiescent current from V_IN (non-switching)	V_EN = 2 V, V_FB = 1.5 V, V_BIAS = 3.3 V external		0.6	12	µA
ENABLE (EN PIN)
V_{EN_VCC_H}	Enable input high level for V_CC output	V_EN rising			1.15	V
V_{EN_VCC_L}	Enable input low level for V_CCoutput	V_EN falling	0.3			V
V_{EN_VOUT_H}	Enable input high level for V_OUT	V_EN rising	1.14	1.196	1.25	V
V_{EN_VOUT_HYS}	Enable input hysteresis for V_OUT	V_EN falling hysteresis		–100		mV
I_{LKG_EN}	Enable input leakage current	V_EN= 2 V		1.4	200	nA
INTERNAL LDO (VCC PIN, BIAS PIN)
V_CC	Internal V_CC voltage	PWM operation		3.27		V
V_CC	Internal V_CC voltage	PFM operation		3.1		V
V_{CC_UVLO}	Internal V_CC undervoltage lockout	V_CC rising	2.96	3.14	3.27	V
V_{CC_UVLO}	Internal V_CC undervoltage lockout	V_CC falling hysteresis		–605		mV
V_{BIAS_ON}	Input changeover	V_BIAS rising		3.09	3.25	V
V_{BIAS_ON}	Input changeover	V_BIAS falling hysteresis		–63		mV
I_{BIAS_NONSW}	Operating quiescent current from external V_BIAS (non-switching)	V_EN = 2 V, V_FB = 1.5 V, V_BIAS = 3.3 V external		21	50	µA
VOLTAGE REFERENCE (FB PIN)
V_FB	Feedback voltage	PWM mode	0.987	1.006	1.017	V
I_{LKG_FB}	Input leakage current at FB pin	V_FB= 1 V		0.2	60	nA
HIGH SIDE DRIVER (CBOOT PIN)
V_{CBOOT_UVLO}	CBOOT - SW undervoltage lockout		1.6	2.2	2.7	V
CURRENT LIMITS AND HICCUP
I_{HS_LIMIT}	Short-circuit, high-side current limit⁽²⁾	LM73605	6	7.3	8.35	A
I_{HS_LIMIT}	Short-circuit, high-side current limit⁽²⁾	LM73606	7.4	8.7	9.85	A
I_{LS_LIMIT}	Low-side current limit⁽²⁾	LM73605	4.79	5.5	6.1	A
I_{LS_LIMIT}	Low-side current limit⁽²⁾	LM73606	5.8	6.6	7.25	A
I_{NEG_LIMIT}	Negative current limit	LM73605		–5		A
I_{NEG_LIMIT}	Negative current limit	LM73606		–6		A
V_HICCUP	Hiccup threshold on FB pin		0.36	0.4	0.44	V
I_{L_ZC}	Zero cross-current limit			0.06		A
SOFT START (SS/TRK PIN)
I_SSC	Soft-start charge current		1.8	2	2.2	µA
R_SSD	Soft-start discharge resistance	UVLO, TSD, OCP, or EN = 0		1		kΩ
POWER GOOD (PGOOD PIN) and OVERVOLTAGE PROTECTION
V_{PGOOD_OV}	Power-good overvoltage threshold	% of FB voltage	106%	110%	113%
V_{PGOOD_UV}	Power-good undervoltage threshold	% of FB voltage	86%	90%	93%
V_{PGOOD_HYS}	Power-good hysteresis	% of FB voltage		1.2%
V_{PGOOD_VALID}	Minimum input voltage for proper PGOOD function	50-µA pullup to PGOOD pin, V_EN= 0 V, T_J = 25°C		1.3	2	V
R_PGOOD	Power-good ON-resistance	V_EN = 2.5V		40	100	Ω
R_PGOOD	Power-good ON-resistance	V_EN = 0 V		30	90	Ω
MOSFETS
R_{DS_ON_HS} ⁽³⁾	High-side MOSFET ON-resistance	I_OUT = 1 A, V_BIAS = V_OUT = 3.3 V		53	90	mΩ
R_{DS_ON_LS} ⁽³⁾	Low-side MOSFET ON-resistance	I_OUT = 1 A, V_BIAS = V_OUT = 3.3 V		31	55	mΩ
THERMAL SHUTDOWN
T_SD ⁽⁴⁾	Thermal shutdown threshold	Shutdown threshold		160		°C
T_SD ⁽⁴⁾	Recovery threshold			135		°C

(1) Shutdown current includes leakage current of the switching transistors.

(2) This current limit was measured as the internal comparator trip point. Due to inherent delays in the current limit comparator and drivers, the peak current limit measured in closed loop with faster slew rate will be larger, and valley current limit will be lower.

(3) Measured at pins

(4) Ensured by design

6.6 Timing Characteristics

			MIN	NOM	MAX	UNIT
CURRENT LIMITS AND HICCUP
N_OC ⁽¹⁾	Number of switching cycles before hiccup is tripped			128		Cycles
t_OC	Overcurrent hiccup retry delay time			46		ms
SOFT START (SS/TRK PIN)
t_SS	Internal soft-start time	C_SS = OPEN, from EN rising edge to PGOOD rising edge	3.5	6.3		ms
POWER GOOD (PGOOD PIN) and OVERVOLTAGE PROTECTION
t_{PGOOD_RISE}	PGOOD rising edge deglitch delay		80	140	200	µs
t_{PGOOD_FALL}	PGOOD falling edge deglitch delay		80	140	200	µs

(1) Ensured by design

6.7 Switching Characteristics

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
PWM LIMITS (SW PINS)
t_ON-MIN	Minimum switch on-time			60	82	ns
t_OFF-MIN	Minimum switch off-time			70	120	ns
t_ON-MAX	Maximum switch on-time	HS timeout in dropout	3	6	9	µs
OSCILLATOR (RT and SYNC PINS)
f_OSC	Internal oscillator frequency	R_T= Open	440	500	560	kHz
f_ADJ	Minimum adjustable frequency by R_Tor SYNC	R_T =115 kΩ, 0.1%	315	350	385	kHz
f_ADJ	Maximum adjustable frequency by R_T or SYNC	R_T = 17.4 kΩ, 0.1%	1980	2200	2420	kHz
V_{SYNC_HIGH}	Sync input high level threshold				2	V
V_{SYNC_LOW}	Sync input low level threshold		0.4			V
V_{MODE_HIGH}	Mode input high level threshold for FPWM			0.42		V
V_{MODE_LOW}	Mode input low level threshold for AUTO mode			0.4		V
t_{SYNC_MIN}	Sync input minimum ON and OFF-time			80		ns

6.8 System Characteristics

The following specifications apply to the circuit found in typical schematic with appropriate modifications from typical bill of materials. These parameters are not tested in production and represent typical performance only. Unless otherwise stated the following conditions apply: T_A = 25°C, V_IN = 12 V, V_OUT = 3.3 V, f_SW = 500 kHz.

PARAMETER		TEST CONDITIONS	MIN	TYP	UNIT
V_{FB_PFM}	Output voltage offset at no load in auto mode	V_IN= 3.8 V to 36 V, V_SYNC = 0 V, auto mode I_OUT= 0 A		2%
V_DROP	Minimum input to output voltage differential to maintain specified accuracy	V_OUT = 5 V, I_OUT= 3 A, f_SW = 2.2 MHz		0.4	V
I_{Q_SW}	Operating quiescent current (switching)	V_EN = 3.3 V, I_OUT = 0 A, R_T = open, V_BIAS = V_OUT = 3.3 V , R_FBT = 1 Meg		15	µA
I_{PEAK_MIN}	Minimum inductor peak current	LM73605 : V_SYNC= 0, I_OUT= 10 mA		1	A
I_{PEAK_MIN}	Minimum inductor peak current	LM73606 : V_SYNC= 0 V, I_OUT= 10 mA		1.3	A
I_{BIAS_SW}	Operating quiescent current from external V_BIAS (switching)	f_SW = 500 kHz, I_OUT= 1 A		7	mA
I_{BIAS_SW}		f_SW = 2.2 MHz, I_OUT= 1 A		25
D_MAX	Maximum switch duty cycle	While in frequency foldback	97.5%
t_DEAD	Dead time between high-side and low-side MOSFETs			4	ns