ZHCSM29A September 2023 – June 2024 LM70840-Q1 , LM70860-Q1 , LM70880-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY (VIN) | ||||||
| IQ-SD | VIN shutdown current | Non-switching, VEN = 0V, VFB = VREF + 50mV, TJ = 25°C | 2.3 | 4 | μA | |
| Non-switching, VEN = 0V, VFB = VREF + 50mV, TJ = 125°C | 2.3 | 8 | μA | |||
| IQ-SBY | VIN standby current (1) | Non-switching, 0.5V ≤ VEN ≤ 1V, External COMP, RCONFIG = 29.4k? | 350 | μA | ||
| IQ-SLEEP1-48V | VIN sleep current, 3.3V fixed output, no load | VEN = 5V, VIN = 48V, VBIAS = 0V, VVOUT = 3.3V, no-load, non-switching, VPFM/SYNCIN = 5V, RFB = 0? to VDDA | 14.4 | μA | ||
| IQ-SLEEP2-48V | VIN sleep current, 5V fixed output, no load | VEN = 5V, VIN = 48V, VBIAS = 5V, VVOUT = 5V, no-load, non-switching, VPFM/SYNCIN = 5V, RFB = 24.9k? to VDDA | 6.9 | 30 | μA | |
| IQ-SLEEP3-48V | VIN sleep current, 12V fixed output, no load | VEN = 5V, VIN = 48V, VBIAS = 12V, VVOUT = 12V, no-load, non-switching, VPFM/SYNCIN = 5V, RFB = 49.9k? to VDDA | 23 | μA | ||
| ENABLE (EN / UVLO) | ||||||
| VSBY-TH | Shutdown-to-standby threshold voltage | VEN/UVLO rising | 0.55 | V | ||
| VEN-TH | Enable voltage rising threshold | VEN/UVLO rising | 0.95 | 1.0 | 1.05 | V |
| VEN-HYS | Enable voltage hysteresis | 0.1 | V | |||
| INTERNAL LDO (VCC) | ||||||
| VVCC1 | VCC regulation voltage | IVCC = 50mA, RFB = 0? or 24.9k? | 4.5 | 5 | 5.5 | V |
| VVCC2 | VCC regulation voltage | IVCC = 50mA | 7 | 8 | 8.5 | V |
| INTERNAL LDO (VDDA) | ||||||
| VVDDA | VDDA regulation voltage | IVDD = 5mA | 4.75 | 5 | 5.25 | V |
| IVDDA-CL | VDDA short-circuit current limit | VDDA = 4.5V | 10 | 15 | 20 | mA |
| EXTERNAL BIAS (BIAS) | ||||||
| VBIAS-TH1 | VIN to VBIAS switchover rising threshold, 12-V fixed or adjustable output | RFB = 49.9k? | 8.8 | 9.1 | 9.3 | V |
| VBIAS-TH2 | VIN to VBIAS switchover rising threshold, 3.3-V or 5-V fixed output | RFB = 0? or 24.9k? | 4.3 | 4.6 | 4.8 | V |
| VBIAS-HYS | VIN to VBIAS switchover hysteresis | 550 | mV | |||
| REFERENCE VOLTAGE (FB) | ||||||
| VFB | Regulated FB voltage | 794 | 800 | 806 | mV | |
| OUTPUT VOLTAGE (VOUT) | ||||||
| VOUT1 | 3.3V output voltage setpoint | RFB = 0? | 3.267 | 3.3 | 3.333 | V |
| VOUT2 | 5V output voltage setpoint |
RFB = 24.9k? | 4.95 | 5.0 | 5.05 | V |
| VOUT3 | 12V output voltage setpoint | RFB = 49.9k? | 11.88 | 12 | 12.12 | V |
| ERROR AMPLIFIER (EXTCOMP) | ||||||
| gm-EXTERNAL | EA transconductance external compensation | FB to COMP | 970 | 1200 | μS | |
| gm-NTERNAL | EA transconductance internal compensation (1) | FB to COMP, EXTCOMP 100k? to VDDA | 30 | μS | ||
| IFB | Error amplifier input bias current | 75 | nA | |||
| VCOMP-CLAMP | COMP clamp voltage | VFB = 0V | 2.1 | V | ||
| ICOMP-SRC | EA source current | VCOMP = 1V, VFB = 0.65V | 170 | μA | ||
| ICOMP-SINK | EA sink current | VCOMP = 1V, VFB = 0.95V | 170 | μA | ||
| PULSE FREQUENCY MODULATION (PFM/SYNCIN) | ||||||
| VIL-SYNCIN | PFM/SYNCIN input threshold low | 0.8 | V | |||
| VIH(SYNCIN) | PFM/SYNCIN input threshold high | 1.17 | V | |||
| fSYNC1 | Synchronization frequency range (220kHz) | RRT = 100k?, ±20 % of the nominal oscillator frequency | 176 | 264 | kHz | |
| fSYNC2 | Synchronization frequency range (2.2MHz) | RRT = 10k?, ±20 % of the nominal oscillator frequency | 1.76 | 2.64 | MHz | |
| tSYNC-TON-MIN | Minimum positive pulse width of external synchronization signal | RRT = 10k? | 20 | ns | ||
| tSYNC-TOFF-MIN | Minimum negative pulse width of external synchronization signal | RRT = 10k? | 200 | ns | ||
| tSYNCIN-SW | Delay from PFM falling edge to SW rising edge (1) | 35 | ns | |||
| tPFM-FILTER | SYNCIN to PFM mode | 15 | 75 | μs | ||
| DUAL RANDOM SPREAD SPECTRUM (DRSS) | ||||||
| ΔfC | Distance from the switching frequency | 8 | % | |||
| fm | Modulation frequency | 10 | kHz | |||
| SWITCHING FREQUENCY (SW) | ||||||
| fSW1 | Switching frequency 1 | RRT = 100kΩ to AGND | 200 | 220 | 240 | kHz |
| fSW2 | Switching frequency 2 | RRT = 49.9kΩ to AGND | 400 | 440 | 480 | kHz |
| fSW3 | Switching frequency 3 | RRT = 22.1kΩ to AGND | 0.85 | 0.95 | 1.05 | MHz |
| fSW4 | Switching frequency 4 | RRT = 9.09kΩ to AGND | 2 | 2.2 | 2.4 | MHz |
| tON-MIN | Minimum on-time(1) | 25 | ns | |||
| tOFF-MIN | Minimum off-time | 88 | 126 | ns | ||
| POWER GOOD (PG) | ||||||
| VPG-UV | Power-Good UV trip level | Falling with respect to the regulated voltage | 90 % | 92 % | 94% | |
| VPG-OV | Power-Good OV trip level | Rising with respect to the regulation voltage | 108 % | 110 % | 112 % | |
| VPG-UV-HYST | Power-Good UV hysteresis | Falling with respect to the regulated output | 3.4 % | |||
| VPG-OV-HYST | Power-Good OV hysteresis | Raising with respect to the regulated output | 3.4 % | |||
| tPG-DEGLITCH | Power-Good deglitch filter time | VOUT falling or rising | 25 | μs | ||
| VOL-PG | Power-Good voltage | Open collector, IPG = 2mA | 0.4 | V | ||
| SYNCHRONIZATION OUTPUT (SYNCOUT) | ||||||
| VSYNCOUT-LTH | SYNCOUT low state voltage threshold | RCONFIG = 54.9k? or 71.5 ?, ISYNCOUT = 2mA | 0.4 | V | ||
| VSYNCOUT-HTH | SYNCOUT high state voltage threshold | RCONFIG = 54.9 ? or 71.5 ?, ISYNCOUT = -2mA | 2.0 | V | ||
| STARTUP (SOFT START) | ||||||
| tSS | Internal fixed soft-start time | 1.9 | 2.8 | 4.4 | ms | |
| INTERNAL HICCUP MODE | ||||||
| tHIC-DLY | HICCUP mode activation delay | VISNS+ - VVOUT > 60mV | 512 | CYCLES | ||
| tHIC-DURATION | HICCUP mode fault duration | VISNS+ - VVOUT > 60mV | 16384 | CYCLES | ||
| OVERCURRENT PROTECTION (OCP) | ||||||
| VCS-TH | CS voltage threshold | Measured from ISNS+ to VOUT | 50 | 56 | 62 | mV |
| tDELAY-CS | CS delay to output | 75 | ns | |||
| GCS | CS amplifier gain (1) | 10 | V/V | |||
| IBIAS-CS | CS amplifier input bias current (1) | 0.35 | μA | |||
| VCS-TH-NEG | CS negative voltage threshold | 30 | mV | |||
| THERMAL SHUTDOWN (TSD) | ||||||
| TJ-SD | Thermal shutdown threshold (1) | Temperature rising | 175 | °C | ||
| TJ-HYS | Thermal shutdown hysteresis (1) | 15 | °C | |||