With the provison to locate the controller as
close as possible to the power MOSFETs to minimize gate driver trace runs, the
components related to the analog and feedback signals as well as current sensing are
considered in the following:
- Separate power and signal
traces, and use a ground plane to provide noise shielding.
- Place all sensitive analog
traces and components related to COMP, FB, ISNS+, and RT away from
high-voltage switching nodes such as SW, HO, LO, or CBOOT to avoid mutual
coupling. Use internal layer or layers as ground plane or planes. Pay
particular attention to shielding the feedback (FB) and current sense (ISNS+
and VOUT) traces from power traces and components.
- Locate the upper and lower
feedback resistors (if required) close to the FB pin, keeping the FB trace
as short as possible. Route the trace from the upper feedback resistor to
the required output voltage sense point at the load.
- Route the ISNS+ and VOUT
sense traces as differential pairs to minimize noise pickup and use Kelvin
connections to the applicable shunt resistor (if shunt current sensing is
used) or to the sense capacitor (if inductor DCR current sensing is
used).
- Minimize the loop area from
the VCC and VIN pins through their respective decoupling capacitors to the
PGND pin. Locate these capacitors as close as possible to the LM5149-Q1.