SNVS234C September 2004 – September 2016 LM5112 , LM5112-Q1
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| PIN | I/O | DESCRIPTION | |||
|---|---|---|---|---|---|
| NAME | WSON | MSOP | |||
| Exposed Pad | — | — | — | Exposed pad, underside of package: Internally bonded to the die substrate. Connect to VEE ground pin for low thermal impedance. | |
| IN | 1 | 4 | I | Non-inverting input pin: TTL compatible thresholds. Pull up to VCC when not used. | |
| INB | 6 | 2 | I | Inverting input pin: TTL compatible thresholds. Connect to IN_REF when not used. | |
| IN_REF | 5 | 1 | — | Ground reference for control inputs: Connect to power ground (VEE) for standard positive only output voltage swing. Connect to system logic ground when VEE is connected to a negative gate drive supply. | |
| N/C | — | 5, 8 | — | Not internally connected | |
| OUT | 4 | 7 | O | Gate drive output: Capable of sourcing 3 A and sinking 7 A. Voltage swing of this output is from VEE to VCC. | |
| VCC | 3 | 6 | I | Positive supply voltage input: Locally decouple to VEE. The decoupling capacitor must be placed close to the chip. | |
| VEE | 2 | 3 | — | Power ground for driver outputs: Connect to either power ground or a negative gate drive supply for positive or negative voltage swing. | |