ZHCS547K January 2010 – February 2018 LM27402
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Wide Input Voltage Range
- 7.3.2 UVLO
- 7.3.3 Precision Enable
- 7.3.4 Soft-Start and Voltage Tracking
- 7.3.5 Output Voltage Setpoint and Accuracy
- 7.3.6 Voltage-Mode Control
- 7.3.7 Power Good
- 7.3.8 Inductor-DCR-Based Overcurrent Protection
- 7.3.9 Current Sensing
- 7.3.10 Power MOSFET Gate Drivers
- 7.3.11 Pre-Bias Start-up
- 7.4 Device Functional Modes
-
8 Application and Implementation
- 8.1
Application Information
- 8.1.1 Converter Design
- 8.1.2 Inductor Selection (L)
- 8.1.3 Output Capacitor Selection (COUT)
- 8.1.4 Input Capacitor Selection (CIN)
- 8.1.5 Using Precision Enable
- 8.1.6 Setting the Soft-Start Time
- 8.1.7 Tracking
- 8.1.8 Setting the Switching Frequency
- 8.1.9 Setting the Current Limit Threshold
- 8.1.10 Control Loop Compensation
- 8.1.11 MOSFET Gate Drivers
- 8.1.12 Power Loss and Efficiency Calculations
- 8.2 Typical Applications
- 8.1
Application Information
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
7.3.7 Power Good
Figure 21. Power Good Behavior
The PGOOD flag of the LM27402 is used to signal when the output is out of regulation or during nonregulated pre-biased conditions. This means that current limit, UVLO, overvoltage threshold, undervoltage threshold, or a non-regulated output will cause the PGOOD pin to pull low. To prevent glitches to PGOOD, a 20-μs deglitch filter is built into the LM27402. Figure 21 illustrates when the PGOOD flag is asserted low.