ZHCSOZ8A april 2023 – august 2023 LM2103
PRODUCTION DATA
Both the high-side and the low-side driver stages include UVLO protection circuitry which monitors the supply voltage (VGVDD) and the bootstrap capacitor voltage (VBST-SH). The UVLO circuit inhibits each output until sufficient supply voltage is available to turn on the external MOSFETs, and the built-in UVLO hysteresis prevents chattering during supply voltage variations. When the supply voltage is applied to the GVDD pin of the device, both outputs are held low until VGVDD exceeds the UVLO threshold, typically 8 V. Any UVLO condition on the bootstrap capacitor (VBST–SH) disables only the high-side output (GH).
| CONDITION (VBST-SH > VBSTR) | INH | INL | GH | GL |
|---|---|---|---|---|
| VGVDD – GND < VGVDDR during device start-up | H | L | L | L |
| L | H | L | L | |
| H | H | L | L | |
| L | L | L | L | |
| VGVDD – GND < VGVDDR – VDDHYS after device start-up | H | L | L | L |
| L | H | L | L | |
| H | H | L | L | |
| L | L | L | L |
| CONDITION (VGVDD > VGVDDR) | INH | INL | GH | GL |
|---|---|---|---|---|
| VBST-SH < VBSTR during device start-up | H | L | L | H |
| L | H | L | L | |
| H | H | L | L | |
| L | L | L | H | |
| VBST-SH < VBSTR – VBSTHYS after device start-up | H | L | L | H |
| L | H | L | L | |
| H | H | L | L | |
| L | L | L | H |