ZHCSGN4B December 2016 – April 2017 LDC2112 , LDC2114
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
- 7.5 Register Maps
-
8 Application and Implementation
- 8.1
Application Information
- 8.1.1 Theory of Operation
- 8.1.2 Designing Sensor Parameters
- 8.1.3 Setting COM Pin Capacitor
- 8.1.4 Defining Power-On Timing
- 8.1.5 Configuring Button Scan Rate
- 8.1.6 Programming Button Sampling Window
- 8.1.7 Scaling Frequency Counter Output
- 8.1.8 Setting Button Triggering Threshold
- 8.1.9 Tracking Baseline
- 8.1.10 Mitigating False Button Detections
- 8.1.11 Reporting Interrupts for Button Presses and Error Conditions
- 8.1.12 Estimating Supply Current
- 8.2 Typical Application
- 8.1
Application Information
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
5 Pin Configuration and Functions
LDC2112
16-Pin DSBGA
Top View (Bumps Down)
LDC2112
16-Pin TSSOP
Top View
Pin Functions - LDC2112
| PIN | I/O(1) | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | DSBGA NO. | TSSOP NO. | ||
| VDD | C1 | 4 | P | Power supply |
| GND | D1 | 2 | G | Ground(2) |
| A4 | 10 | |||
| INTB | B2 | 5 | O | Interrupt output Polarity can be configured in Register 0x11. |
| LPWRB | C2 | 3 | I | Normal / Low Power Mode select Set LPWRB to VDD for Normal Power Mode or ground for Low Power Mode. |
| COM | D2 | 1 | A | Common return current path for all LC resonator sensors A capacitor should be connected from this pin to GND. Refer to Setting COM Pin Capacitor. |
| IN0 | A3 | 9 | A | Channel 0 LC sensor input |
| IN1 | A2 | 8 | A | Channel 1 LC sensor input |
| OUT0 | D4 | 15 | O | Channel 0 logic output Polarity can be configured in Register 0x1C. |
| OUT1 | C4 | 13 | O | Channel 1 logic output Polarity can be configured in Register 0x1C. |
| ADDR | B3 | 11 | I | I2C address When ADDR = Ground, I2C address = 0x2A. When ADDR = VDD, I2C address = 0x2B. |
| SCL | D3 | 16 | I | I2C clock |
| SDA | C3 | 14 | I/O | I2C data |
| NC | A1 | 7 | — | No connect Leave them floating. |
| B1 | 6 | |||
| B4 | 12 | |||
(1) I = Input, O = Output, P=Power, G=Ground, A=Analog
(2) Both pins should be connected to the system ground on the PCB.
LDC2114
16-Pin DSBGA
Top View (Bumps Down)
LDC2114
16-Pin TSSOP
Top View
Pin Functions - LDC2114
| PIN | I/O(1) | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | DSBGA NO. | TSSOP NO. | ||
| VDD | C1 | 4 | P | Power supply |
| GND | D1 | 2 | G | Ground(2) |
| A4 | 10 | |||
| INTB | B2 | 5 | O | Interrupt output Polarity can be configured in Register 0x11. |
| LPWRB | C2 | 3 | I | Normal / Low Power Mode select Set LPWRB to VDD for Normal Power Mode or ground for Low Power Mode. |
| COM | D2 | 1 | A | Common return current path for all LC resonator sensors A capacitor should be connected from this pin to GND. Refer to Setting COM Pin Capacitor. |
| IN0 | A3 | 9 | A | Channel 0 LC sensor input |
| IN1 | A2 | 8 | A | Channel 1 LC sensor input |
| IN2 | A1 | 7 | A | Channel 2 LC sensor input |
| IN3 | B1 | 6 | A | Channel 3 LC sensor input |
| OUT0 | D4 | 15 | O | Channel 0 logic output Polarity can be configured in Register 0x1C. |
| OUT1 | C4 | 13 | O | Channel 1 logic output Polarity can be configured in Register 0x1C. |
| OUT2 | B4 | 12 | O | Channel 2 logic output Polarity can be configured in Register 0x1C. |
| OUT3 | B3 | 11 | O | Channel 3 logic output Polarity can be configured in Register 0x1C. |
| SCL | D3 | 16 | I | I2C clock |
| SDA | C3 | 14 | I/O | I2C data I2C address = 0x2A. |
(1) I = Input, O = Output, P=Power, G=Ground, A=Analog
(2) Both pins should be connected to the system ground on the PCB.