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ZHCSD31H November 2014 – November 2024 ISO7821

PRODUCTION DATA

封裝選項(xiàng)

請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DWW|16
DW|16

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購信息

5.10 Insulation Specifications

Table 5-2 Insulation Characteristics

PARAMETER		TEST CONDITIONS	SPECIFICATION		UNIT
PARAMETER		TEST CONDITIONS	DW	DWW	UNIT
DTI	Distance through the insulation	Minimum internal gap (internal clearance)	21	21	μm
V_IOWM	Maximum working isolation voltage	Time dependent dielectric breakdown (TDDB) test	1500	2000	V_RMS
V_IOWM	Maximum working isolation voltage	Time dependent dielectric breakdown (TDDB) test	2121	2828	V_DC
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V_IOTM	Maximum transient isolation voltage	V_TEST = V_IOTM t = 60 sec (qualification) t= 1 sec (100% production)	8000	8000	V_PK
V_IOSM	Maximum surge isolation voltage	Test method per IEC 60065, 1.2/50 μs waveform, V_TEST = 1.6 × V_IOSM = 12800 V_PK⁽¹⁾ (qualification)	8000	8000	V_PK
V_IORM	Maximum repetitive peak isolation voltage		2121	2828	V_PK
V_PR	Input-to-output test voltage	Method a, After Input/Output safety test subgroup 2/3, V_PR = V_IORM × 1.2, t = 10 s, Partial discharge < 5 pC	2545	3394	V_PK
		Method a, After environmental tests subgroup 1, V_PR = V_IORM × 1.6, t = 10 s, Partial Discharge < 5 pC	3394	4525
		Method b1,After environmental tests subgroup 1, V_PR = V_IORM × 1.875, t = 1 s (100% Production test) Partial discharge < 5 pC	3977	5303
R_S	Isolation resistance	V_IO = 500 V at T_S	>10⁹	>10⁹	?
	Pollution degree		2	2
	Climatic category		55/125/21	55/125/21
UL 1577
V_ISO	Withstanding isolation voltage	V_TEST = V_ISO = 5700 V_RMS, t = 60 sec (qualification); V_TEST = 1.2 × V_ISO = 6840 V_RMS, t = 1 sec (100% production)	5700	5700	V_RMS

(1) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.

Table 5-3 Package Insulation and Safety-Related Specifications (over recommended operating conditions (unless otherwise noted)

PARAMETER		TEST CONDITIONS		MIN	TYP	UNIT
CLR	External clearance	Shortest terminal-to-terminal distance through air	DW-16	8.15		mm
CLR	External clearance	Shortest terminal-to-terminal distance through air	DWW-16	14.5	15.0	mm
CPG	External creepage	Shortest terminal-to-terminal distance across the package surface	DW-16	8.15		mm
CPG	External creepage		DWW-16	14.5	15.0	mm
CTI	Comparative tracking index	DIN EN 60112 (VDE 0303-11); IEC 60112; UL 746A		600		V
R_IO	Isolation resistance, input to output⁽¹⁾	V_IO = 500 V, T_A = 25°C		10¹²		?
R_IO	Isolation resistance, input to output⁽¹⁾	V_IO = 500 V, 100°C ≤ T_A ≤ max		10¹¹		?
C_IO	Barrier capacitance, input to output⁽¹⁾	V_IO = 0.4 x sin (2πft), f = 1 MHz			1	pF
C_I	Input capacitance⁽²⁾	V_I = V_CC/2 + 0.4 x sin (2πft), f = 1 MHz, V_CC = 5 V			2	pF

(1) All pins on each side of the barrier tied together creating a two-terminal device.

(2) Measured from input pin to ground.

Note:

Creepage and clearance requirements must be applied according to the specific equipment isolation standards of an application. Care must be taken to maintain the creepage and clearance distance of a board design to verify that the mounting pads of the isolator on the printed-circuit board do not reduce this distance.

Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications.