ZHCSHL9A February 2018 – March 2018 ESD224
PRODUCTION DATA.
Figure 1. Positive TLP Curve, Connector side IO Pin to GND (tp=100ns)
Figure 3. Clamping voltage waveform for +8kV IEC 61000-4-2 stress. See Figure 11 for details.
Figure 5. IEC 61000-4-5 Surge Waveform (tp=8/20 µs)
Figure 7. DC Voltage Sweep I-V Curve, IO Pin to GND
Figure 9. Differential Insertion Loss
Figure 2. Negative TLP Curve, Connector side IO Pin to GND (Plotted as positive TLP from GND to IO, tp=100ns )
Figure 4. Clamping voltage waveform for -8kV IEC 61000-4-2 stress. See Figure 11 for details.
Figure 6. Capacitance vs. Bias Voltage at 25 degree Celsius
Figure 8. Leakage Current vs Temperature, IO Pin to GND, at 2.5 V Bias
Figure 10. Capacitance vs Frequency