ZHCSOU1 February 2023 DS90UB638-Q1
PRODUCTION DATA
An optional at-speed built-in self test (BIST) feature supports high-speed serial link and the back channel testing without external data connections. The BIST mode is enabled by either applying a logic high level to the BISTEN pin or by programming the BIST configuration register 0xB3. This is useful in the prototype stage, equipment production, in-system test, and system diagnostics.
When BIST is activated, the DS90UB638-Q1 sends register writes to the serializer through the back channel. The control channel register writes configure the serializer for BIST mode operation. The serializer outputs a continuous stream of a pseudo-random sequence and drives the link at speed. The deserializer detects the test pattern and monitors it for errors. The serializer also tracks errors indicated by the CRC fields in each back channel frame.
The LOCK, PASS and CMLOUT output functions are all available during BIST mode. While the lock indications are required to identify the beginning of proper data reception, for any link failures or data corruption, the best indication is the contents of the error counter in the BIST_ERR_COUNT register 0x57 for the RX port. The test may select whether the serializer uses an external or internal clock as reference for the BIST pattern frequency.