ZHCSOU0 February 2023 DS90UB635-Q1
PRODUCTION DATA
The LPF1 and LPF2 pins are for connecting filter capacitors to the internal PLL circuits. LPF1 should have a 0.022-μF capacitor connected to the VDD_PLL pin (pin 11). The capacitor connected between LPF1 and VDDPLL must enclose as small of a loop as possible. LPF2 must have a 0.1-μF capacitor connecting the pin to GND. One of these PLLs generates the high-speed clock used in the serialization of the output, while the other PLL is used in the CSI-2 receive port. Noise coupled into these pins degrades the performance of the PLLs in the DS90UB635-Q1, so the caps must be placed close to the pins they are connected to, and the area of the loop enclosed must be minimized.