ZHCSG57B March 2017 – December 2018 DRV8702D-Q1 , DRV8703D-Q1
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
A clamping structure limits the gate-drive output voltage to the VC(GS) voltage to protect the power FETs from damage. The positive voltage clamp is realized using a series of diodes. The negative voltage clamp uses the body diodes of the internal predriver FET.
Figure 44. Gate Drive Clamp