ZHCSG01C February 2017 – August 2018 DRV8320 , DRV8320R , DRV8323 , DRV8323R
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Three Phase Smart Gate Drivers
- 8.3.2 DVDD Linear Voltage Regulator
- 8.3.3 Pin Diagrams
- 8.3.4 Low-Side Current Sense Amplifiers (DRV8323 and DRV8323R Only)
- 8.3.5 Step-Down Buck Regulator
- 8.3.6 Gate Driver Protective Circuits
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Maps
- Table 1. DRV832xS and DRV832xRS Register Map
- 8.6.1 Status Registers
- 8.6.2 Control Registers
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1
Primary Application
- 9.2.1.1 Design Requirements
- 9.2.1.2 Detailed Design Procedure
- 9.2.1.3 Application Curves
- 9.2.2 Alternative Application
- 9.2.1
Primary Application
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
8.3.1.1.4 Independent PWM Mode (PWM_MODE = 11b or MODE Pin Tied to DVDD)
In independent PWM mode, the corresponding input pin independently controls each high-side and low-side gate driver. This control mode lets the DRV832x family of devices drive separate high-side and low-side loads with each half-bridge. These types of loads include unidirectional brushed DC motors, solenoids, and low-side and high-side switches. In this mode, if the system is configured in a half-bridge configuration, turning on both the high-side and low-side MOSFETs at the same time causes shoot-through.
Table 6. Independent PWM Mode Truth Table
| INLx | INHx | GLx | GHx |
|---|---|---|---|
| 0 | 0 | L | L |
| 0 | 1 | L | H |
| 1 | 0 | H | L |
| 1 | 1 | H | H |
Because the high-side and low-side VDS overcurrent monitors share the SHx sense line, using the monitors when both the high-side and low-side gate drivers of one half-bridge are split and being used is not possible. In this case, connect the SHx pin to the high-side driver and disable the VDS overcurrent monitors as shown in Figure 20.
Figure 20. Independent PWM High-Side and Low-Side Drivers If the half-bridge is used to implement only a high-side or low-side driver, using the VDS overcurrent monitors is still possible. Connect the SHx pin as shown in Figure 21 or Figure 22. The unused gate driver and the corresponding input can stay disconnected.
Figure 21. One High-Side Driver 
Figure 22. One Low-Side Driver