ZHCSG01C February 2017 – August 2018 DRV8320 , DRV8320R , DRV8323 , DRV8323R
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Three Phase Smart Gate Drivers
- 8.3.2 DVDD Linear Voltage Regulator
- 8.3.3 Pin Diagrams
- 8.3.4 Low-Side Current Sense Amplifiers (DRV8323 and DRV8323R Only)
- 8.3.5 Step-Down Buck Regulator
- 8.3.6 Gate Driver Protective Circuits
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Maps
- Table 1. DRV832xS and DRV832xRS Register Map
- 8.6.1 Status Registers
- 8.6.2 Control Registers
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1
Primary Application
- 9.2.1.1 Design Requirements
- 9.2.1.2 Detailed Design Procedure
- 9.2.1.3 Application Curves
- 9.2.2 Alternative Application
- 9.2.1
Primary Application
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
8.3.1.4 Smart Gate Drive Architecture
The DRV832x gate drivers use an adjustable, complimentary, push-pull topology for both the high-side and low-side drivers. This topology allows for both a strong pullup and pulldown of the external MOSFET gates.
Additionally, the gate drivers use a Smart Gate Drive architecture to provide additional control of the external power MOSFETs, additional steps to protect the MOSFETs, and optimal tradeoffs between efficiency and robustness. This architecture is implemented through two components called IDRIVE and TDRIVE which are described in the IDRIVE: MOSFET Slew-Rate Control section and TDRIVE: MOSFET Gate Drive Control section. Figure 26 shows the high-level functional block diagram of the gate driver.
The IDRIVE gate drive current and TDRIVE gate drive time should be initially selected based on the parameters of the external power MOSFET used in the system and the desired rise and fall times (see the Application and Implementation section).
The high-side gate driver also implements a Zener clamp diode to help protect the external MOSFET gate from overvoltage conditions in the case of external short-circuit events on the MOSFET.
Figure 26. Gate Driver Block Diagram