ZHCSG01C February 2017 – August 2018 DRV8320 , DRV8320R , DRV8323 , DRV8323R
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Three Phase Smart Gate Drivers
- 8.3.2 DVDD Linear Voltage Regulator
- 8.3.3 Pin Diagrams
- 8.3.4 Low-Side Current Sense Amplifiers (DRV8323 and DRV8323R Only)
- 8.3.5 Step-Down Buck Regulator
- 8.3.6 Gate Driver Protective Circuits
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Maps
- Table 1. DRV832xS and DRV832xRS Register Map
- 8.6.1 Status Registers
- 8.6.2 Control Registers
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1
Primary Application
- 9.2.1.1 Design Requirements
- 9.2.1.2 Detailed Design Procedure
- 9.2.1.3 Application Curves
- 9.2.2 Alternative Application
- 9.2.1
Primary Application
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
8.3.4.1 Bidirectional Current Sense Operation
The SOx pin on the DRV8323 and DRV8323R outputs an analog voltage equal to the voltage across the SPx and SNx pins multiplied by the gain setting (GCSA). The gain setting is adjustable between four different levels
(5 V/V, 10 V/V, 20 V/V, and 40 V/V). Use Equation 3 to calculate the current through the shunt resistor.
Equation 3. 
Figure 35. Bidirectional Current Sense Configuration 
Figure 36. Bidirectional Current Sense Output 
Figure 37. Bidirectional Current Sense Regions