ZHCSAO1D January 2013 – August 2016 CSD97374Q4M
An external VDD voltage is required to supply the integrated gate driver IC and provide the necessary gate drive power for the MOSFETS. A 1-µF 10-V X5R or higher ceramic capacitor is recommended to bypass VDD pin to PGND. A bootstrap circuit to provide gate drive power for the control FET is also included. The bootstrap supply to drive the control FET is generated by connecting a 100-nF 16-V X5R ceramic capacitor between BOOT and BOOT_R pins. An optional RBOOT resistor can be used to slow down the turnon speed of the control FET and reduce voltage spikes on the VSW node. A typical 1-Ω to 4.7-Ω value is a compromise between switching loss and VSW spike amplitude.