ZHCSAO1D January 2013 – August 2016 CSD97374Q4M
| PARAMETER | CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| PLOSS | ||||||
| Power loss(1) | VIN = 12 V, VDD = 5 V, VOUT = 1.8 V, IOUT = 15 A,
ƒSW = 500 kHz, LOUT = 0.29 µH , TJ = 25°C |
2.3 | W | |||
| Power loss(2) | VIN = 19 V, VDD = 5 V, VOUT = 1.8 V, IOUT = 15 A,
ƒSW = 500 kHz, LOUT = 0.29 µH , TJ = 25°C |
2.5 | W | |||
| Power loss(2) | VIN = 19 V, VDD = 5 V, VOUT = 1.8 V, IOUT = 15 A,
ƒSW = 500 kHz, LOUT = 0.29 µH , TJ = 125°C |
2.8 | W | |||
| VIN | ||||||
| IQ | VIN quiescent current | PWM = floating, VDD = 5 V, VIN= 24 V | 1 | µA | ||
| VDD | ||||||
| IDD | Standby supply current | PWM = float, SKIP# = VDD or 0 V | 130 | µA | ||
| SKIP# = float | 8 | |||||
| IDD | Operating supply current | PWM = 50% duty cycle, ƒSW = 500 kHz | 8.2 | mA | ||
| POWER-ON RESET AND UNDERVOLTAGE LOCKOUT | ||||||
| VDD rising | Power-on reset | 4.15 | V | |||
| VDD falling | UVLO | 3.7 | V | |||
| Hysteresis | 0.2 | mV | ||||
| PWM AND SKIP# I/O SPECIFICATIONS | ||||||
| RI | Input impedance | Pullup to VDD | 1700 | kΩ | ||
| Pulldown (to GND) | 800 | |||||
| VIH | Logic level high | 2.65 | V | |||
| VIL | Logic level low | 0.6 | V | |||
| VIH | Hysteresis | 0.2 | V | |||
| VTS | Tri-state voltage | 1.3 | 2 | V | ||
| tTHOLD(off1) | Tri-state activation time (falling) PWM | 60 | ns | |||
| tTHOLD(off2) | Tri-state activation time (rising) PWM | 60 | ns | |||
| tTSKF | Tri-state activation time (falling) SKIP# | 1 | µs | |||
| tTSKR | Tri-state activation time (rising) SKIP# | 1 | µs | |||
| t3RD(PWM)(2) | Tri-state exit time PWM | 100 | ns | |||
| t3RD(SKIP#)(2) | Tri-state exit time SKIP# | 50 | µs | |||
| BOOTSTRAP SWITCH | ||||||
| VFBST | Forward voltage | IF = 10 mA | 120 | 240 | mV | |
| IRLEAK(2) | Reverse leakage | VBST – VDD = 25 V | 2 | µA | ||