SCAS880F August 2009 – September 2015 CDCLVP1204
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Terminal Characteristics
- 6.6 Electrical Characteristics: LVCMOS Input
- 6.7 Electrical Characteristics: Differential Input
- 6.8 Electrical Characteristics: LVPECL Output
- 6.9 Electrical Characteristics: LVPECL Output
- 6.10 Timing Diagrams
- 6.11 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Applications and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
10 Power Supply Recommendations
High-performance clock buffers are sensitive to noise on the power supply, which can dramatically increase the additive jitter of the buffer. Thus, it is essential to reduce noise from the system power supply, especially when jitter/phase noise is very critical to applications.
Filter capacitors are used to eliminate the low-frequency noise from the power supply, where the bypass capacitors provide the very low impedance path for high-frequency noise and guard the power-supply system against the induced fluctuations. These bypass capacitors also provide instantaneous current surges as required by the device and must have low equivalent series resistance (ESR). To properly use the bypass capacitors, they must be placed very close to the power-supply terminals and laid out with short loops to minimize inductance. It is recommended to add as many high-frequency (for example, 0.1-μF) bypass capacitors as there are supply terminals in the package. It is recommended, but not required, to insert a ferrite bead between the board power supply and the chip power supply that isolates the high-frequency switching noises generated by the clock driver; these beads prevent the switching noise from leaking into the board supply. It is imperative to choose an appropriate ferrite bead with very low DC resistance to provide adequate isolation between the board supply and the chip supply, as well as to maintain a voltage at the supply terminals that is greater than the minimum voltage required for proper operation.
Figure 23 illustrates this recommended power-supply decoupling method.
Figure 23. Power-Supply Decoupling