ZHCSVX6C January 2004 – April 2024 CD74HCT4051-Q1
PRODUCTION DATA
- 1
- 1特性
- 2應用
- 3說明
- 4Pin Configuration and Functions
- 5Specifications
- 6Parameter Measurement Information
- 7Device and Documentation Support
- 8Revision History
- 9Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- D|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
6 Parameter Measurement Information
Figure 6-1 Propagation delay and output
transition times. Waveform 1
Figure 6-2 Output enable and disable
times. Waveform 2CL includes probe and test-fixture capacitance.
Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1MHz, ZO = 50Ω, tr = 6ns, tf = 6ns.
For clock inputs, fMAX is measured with the input duty cycle at 50%.
The outputs are measured one at a time, with one input transition per measurement.
tPLZ and tPHZ are the same as tdis.
tPZL AND tPZH are the same as ten.
tPLH and tPHL are the same as tpd.
Figure 6-3 Frequency Response Test Circuit
Figure 6-5 ?Sine-Wave Distortion Test Circuit
Figure 6-4 Crosstalk Between Two Switches Test Circuit
Figure 6-6 Control to Switch Feedthrough Noise Test Circuit
Figure 6-7 Switch
OFF Signal Feedthrough
Figure 6-8 Switch
ON/OFF Propagation Delay Test Circuit
Figure 6-9 Switch In
to Switch Out Propagation Delay Test Circuit