ZHCSE65B August 2015 – November 2018
PRODUCTION DATA.
| PIN NUMBER | PIN NAME | TYPE | DESCRIPTION |
|---|---|---|---|
| 1 | COM | O(1) | Open-drain output LCD common connection. Leave unconnected if not used. |
| 2 | ALERT | I | Input from the bq769x0 AFE |
| 3 | SDA | I/O | Data transfer to and from the bq769x0 AFE. Requires a 10-k pullup to VCC |
| 4 | SCL | I/O | Communication clock to the bq769x0 AFE. Requires a 10-k pullup to VCC |
| 5 | PRECHG | O | Programmable polarity (default is active low) output to enable an optional precharge FET. This pin requires an external pullup to 2.5 V when configured as active high, and is open drain when configured as active low. |
| 6 | VAUX | AI | Auxiliary voltage input. If this pin is not used, then it should be tied to VSS. |
| 7 | BAT | AI | Translated battery voltage input |
| 8 | PRES | I | Active low input to sense system insertion. This typically requires additional ESD protection. If this pin is not used, then it should be tied to VSS. |
| 9 | KEYIN | I | A low level indicates application key-switch is inactive on position. A high level causes the DSG protection FET to open. If this pin is not used, then it should be tied to VSS. |
| 10 | SAFE | O | Active high output to enforce an additional level of safety protection (for example, fuse blow) |
| 11 | SMBD | I/OD | SMBus data open-drain bidirectional pin used to transfer an address and data to and from the bq78350-R1 device |
| 12 | VEN | O | Active high voltage translation enable. This open drain signal is used to switch the input voltage divider on/off to reduce the power consumption of the BAT translation divider network. |
| 13 | SMBC | I/OD | SMBus clock open-drain bidirectional pin used to clock the data transfer to and from the bq78350-R1 device |
| 14 | DISP | I | Display control for the LEDs. This pin is typically connected to bq78350-R1 device REGOUT via a 100-KΩ resistor and a push-button switch connect to VSS. Not used with LCD display enabled and can be tied to VSS. |
| 15 | PWRM | O | Power mode state indicator open drain output |
| 16 | LED1 | O | LED1/LCD1 display segment that drives an external LED/LCD, depending on the firmware configuration |
| 17 | LED2 | O | LED2/LCD2 display segment that drives an external LED/LCD, depending on the firmware configuration |
| 18 | LED3 | O | LED3/LCD3 display segment that drives an external LED/LCD, depending on the firmware configuration |
| 19 | LED4 | O | LED4/LCD4 display segment that drives an external LED/LCD, depending on the firmware configuration |
| 20 | LED5 | O | LED5/LCD5 display segment that drives an external LED/LCD, depending on the firmware configuration |
| 21 | GPIO A | I/O | Configurable Input or Output. If not used, tie to VSS. |
| 22 | VSS | — | Negative supply voltage |
| 23 | VSS | — | Negative supply voltage |
| 24 | MRST | I | Master reset input that forces the device into reset when held low. This pin must be held high for normal operation. |
| 25 | VSS | — | Negative supply voltage |
| 26 | VCC | P | Positive supply voltage |
| 27 | RBI | P | RAM backup input. Connect a capacitor to this pin and VSS to protect loss of RAM data in case of short circuit condition. |
| 28 | GPIO B | I/O | Configurable input or output. If not used, tie to VSS. |
| 29 | ADREN | O | Optional digital signal enables address detection measurement to reduce power consumption. |
| 30 | SMBA | IA | Optional SMBus address detection input. If this pin is not used, then it should be tied to VSS. |