ZHCSMD3C June 2020 – August 2022 BQ25792
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 Revision History
- 5 說(shuō)明（續(xù)）
- 6 Device Comparison
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Device Power-On-Reset
- 9.3.2 PROG Pin Configuration
- 9.3.3 Device Power Up from Battery without Input Source
- 9.3.4 Device Power Up from Input Source
- 9.3.5 Dual-Input Power Mux
- 9.3.6 Buck-Boost Converter Operation
- 9.3.7 USB On-The-Go (OTG)
- 9.3.8 Power Path Management
- 9.3.9 Battery Charging Management
- 9.3.10 Integrated 16-Bit ADC for Monitoring
- 9.3.11 Status Outputs ( STAT, and INT)
- 9.3.12 Ship FET Control
- 9.3.13 Protections
- 9.3.14 Serial Interface
- 9.4 Device Functional Modes
- 9.5 Register Map
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RQM|29
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
12.2 Layout Example
Figure 12-2 PCB Layout Example (Top Layer
Copper Pours Removed on Left, Shown on Right)Figure 12-2 shows the recommended placement and routing of external components. The components are labelled with "R," "C" or "L" to indicate resistor, capacitor or inductor and a number that corresponds to the numbered list in Section 12.1. Since the layout guidelines are listed in priority order, this number also provides a priority for component placement.
The placement of C1 and C2 0.1 μF PMID and SYS capacitors is critical for noise filtering. They should be placed on the same layer as the BQ25792, as close to the IC as possible. This will generally require that the traces to connect SW1 and SW2 to the inductor are routed on a different layer.
The SW1 and SW2 pins are routed to vias placed under the IC and then back out on an inner PCB layer. This supports the tightest placement of C1 and C2 capctiors as described above. These vias are also used to route to the C7 BTST1 and BTST2 capactiors on the bottom layer as shown.