ZHCSMD3C June 2020 – August 2022 BQ25792
PRODUCTION DATA
At POR, the charger detects the PROG pin pull down resistance, then sets the charger default POR switching frequency and the battery cell count. Please follow the resistance list in Table 9-1 to set the desired POR switching frequency and battery cell count. The surface mount resistor with ±1% or ±2% tolerance is recommended.
| SWITCHING FREQUENCY | CELL COUNT | TYPICAL RESISTANCE AT PROG PIN |
|---|---|---|
| 1.5 MHz | 1s | 3.0 kΩ |
| 750 kHz | 1s | 4.7 kΩ |
| 1.5 MHz | 2s | 6.04 kΩ |
| 750 kHz | 2s | 8.2 kΩ |
| 1.5 MHz | 3s | 10.5 kΩ |
| 750 kHz | 3s | 13.7 kΩ |
| 1.5 MHz | 4s | 17.4 kΩ |
| 750 kHz | 4s | 27.0 kΩ |
Some of the charging parameters default values are determined by the battery cell count identified by PROG pin configuration, which are summarized in the table below.
| CELL (REG0x0A[7:6]) | 1s | 2s | 3s | 4s |
|---|---|---|---|---|
| ICHG (REG0x03/04) | 2 A | 2 A | 1 A | 1 A |
| VSYSMIN (REG0x00[5:0]) | 3.5 V | 7 V | 9 V | 12 V |
| VREG (REG0x01/02) | 4.2 V | 8.4 V | 12.6 V | 16.8 V |
| VREG Range | 3 V - 4.99 V | 5 V - 9.99 V | 10 V - 13.99 V | 14 V - 18.8 V |
After POR, the host can program the ICHG and VSYSMIN registers to any values within the ranges defined in the register tables. However, when programming the battery charging voltage (VREG), the host must ensure the VREG value is in the allowed range associated with the CELL register (REG0x0A[7:6]) setting defined in the table above. When the CELL register is changed, the ICHG, VSYSMIN and VREG registers are reset to the POR default values associated with the CELL setting.
For example, if the PROG pin resistance is a 2s battery configuration, the default POR CELL, ICHG, VSYSMIN and VREG settings will be 2s, 2 A, 7 V and 8.4 V respectively. After POR, the host can change ICHG and VSYSMIN to any values, and can change VREG to any value between 5V and 9.99V. Assuming that the CELL bits remain at the 2s battery configuration, then when the REG_RST bit is set or the watchdog timer expires, the registers are reset to default values with ICHG, VSYSMIN and VREG automatically returing to 2 A, 7V and 8.4V respectively.
When the CELL register is 2s battery configuration, any write out of the range of VREG (5 V - 9.99 V) is ignored by the charger. If VREG needs to be programmed out of the 5 V - 9.9 V range, such as 11 V, the CELL bits have to be changed to the 3s setting. Setting the CELL bits will also cause the ICHG, VSYSMIN and VREG registers to reset to their 3s POR default values of 1 A, 9 V and 12.6 V. Then the host can program VREG in the range of 10 V - 13.99 V. If, after changing the CELL bits to 3S, the REG_RST bit is set or the watchdog timer expires, the ICHG, VSYSMIN and VREG will then be reset to 1 A, 9 V and 12.6 V, regardless of the state of the PROG pin.