When battery charging is enabled (EN_CHG bit =1 and CE pin is LOW), the device autonomously completes a charging cycle without host involvement. The device charging parameters can be set by hardware through the FB pin to set regulation voltage and the ICHG pin to set charging current. The host can always control the charging operation and optimize the charging parameters by writing to the corresponding registers through I²C.

A new charge cycle starts when the following conditions are valid:

• VAC is within the ACUV and ACOV operating window
• Device is not in HIZ mode (EN_HIZ = 0 and ILIM_HIZ pin voltage is below V_{IH_ILIM_HIZ})
• REGN is above V_{REGN_OK}
• Battery charging is enabled (EN_CHG = 1 and CE pin is LOW )
• No thermistor fault on TS
• No safety timer fault

For lead acid battery charging (EN_3_STAGE_CHARGE = 1), the charger device automatically transitions from Absorb phase to Float voltage phase when the charging current is below termination threshold, and device is not in DPM mode. In addition, the device offers a dedicated CV timer to transition from Absorb to Float stage after a programmable period (CV_TMR bits) regardless of the charge current value. The device remains in the Float stage indefinitely. A new charge cycle can be initiated by toggle of either CE pin or EN_CHG bit.

The status register (CHARGE_STAT) indicates the different charging phases as:

• 000 – Not Charging
• 011 – Fast-charge (CC mode)
• 100 – Absorb Charge (CV mode)
• 101 – Float Charge (CV mode)
• 110 – Top-off Timer Active Charging
• All other codes are RESERVED

When the charger transitions to any of these states, including when charge cycle is completed, an INT pulse is asserted to notify the host.

For supercapacitor charging, the charger outputs ICHG current as long as the feedback voltage (V_FB) is below VFB_REG. The following settings are recommended for supercapacitor charging:

• EN_TERM = 0