TVP7002

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三通道 8/10 位 165/110MSPS 視頻 ADC

產品詳情

Type HDMI Companion Rating Catalog Operating temperature range (°C) 0 to 70
Type HDMI Companion Rating Catalog Operating temperature range (°C) 0 to 70
HTQFP (PZP) 100 256 mm2 16 x 16
  • Analog Channels
    • –6-dB to 6-dB Analog Gain
    • Analog Input Multiplexers (MUXs)
    • Automatic Video Clamp
    • Three Digitizing Channels, Each With Independently Controllable Clamp, Gain, Offset, and Analog-to-Digital Converter (ADC)
    • Clamping: Selectable Clamping Between Bottom Level and Mid Level
    • Offset: 1024-Step Programmable RGB or YPbPr Offset Control
    • Gain: 8-Bit Programmable Gain Control
    • ADC: 8-/10-Bit 165-/110-MSPS ADC
    • Automatic Level Control (ALC) Circuit
    • Composite Sync: Integrated Sync-on-Green Extraction From Green/Luminance Channel
    • Support for DC- and AC-Coupled Input Signals
    • Supports Component Video Standards 480i, 576i, 480p, 576p, 720p, 1080i, and 1080p
    • Supports PC Graphics Inputs up to UXGA Programmable RGB-to-YCbCr Color Space Conversion
  • Horizontal PLL
    • Fully Integrated Horizontal PLL for Pixel Clock Generation
    • 12-MHz to 165-MHz Pixel Clock Generation From HSYNC Input
    • Adjustable Horizontal PLL Loop Bandwidth for Minimum Jitter
    • 5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
  • Output Formatter
    • Supports 20-bit 4:2:2 Outputs With Embedded Syncs
    • Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
    • Dedicated DATACLK Output With Programmable Output Polarity for Easy Latching of Output Data
  • System
    • Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
    • Space-Saving 100-Pin TQFP Package
    • Thermally-Enhanced PowerPAD Package for Better Heat Dissipation
  • Analog Channels
    • –6-dB to 6-dB Analog Gain
    • Analog Input Multiplexers (MUXs)
    • Automatic Video Clamp
    • Three Digitizing Channels, Each With Independently Controllable Clamp, Gain, Offset, and Analog-to-Digital Converter (ADC)
    • Clamping: Selectable Clamping Between Bottom Level and Mid Level
    • Offset: 1024-Step Programmable RGB or YPbPr Offset Control
    • Gain: 8-Bit Programmable Gain Control
    • ADC: 8-/10-Bit 165-/110-MSPS ADC
    • Automatic Level Control (ALC) Circuit
    • Composite Sync: Integrated Sync-on-Green Extraction From Green/Luminance Channel
    • Support for DC- and AC-Coupled Input Signals
    • Supports Component Video Standards 480i, 576i, 480p, 576p, 720p, 1080i, and 1080p
    • Supports PC Graphics Inputs up to UXGA Programmable RGB-to-YCbCr Color Space Conversion
  • Horizontal PLL
    • Fully Integrated Horizontal PLL for Pixel Clock Generation
    • 12-MHz to 165-MHz Pixel Clock Generation From HSYNC Input
    • Adjustable Horizontal PLL Loop Bandwidth for Minimum Jitter
    • 5-Bit Programmable Subpixel Accurate Positioning of Sampling Phase
  • Output Formatter
    • Supports 20-bit 4:2:2 Outputs With Embedded Syncs
    • Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
    • Dedicated DATACLK Output With Programmable Output Polarity for Easy Latching of Output Data
  • System
    • Industry-Standard Normal/Fast I2C Interface With Register Readback Capability
    • Space-Saving 100-Pin TQFP Package
    • Thermally-Enhanced PowerPAD Package for Better Heat Dissipation

The TVP7002 is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 165 MHz. Therefore, it can be used for PC graphics digitizing up to the VESA standard of UXGA (1600 × 1200) resolution at a 60-Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080p.

The TVP7002 is powered from 3.3-V and 1.9-V supply and integrates a triple high-performance analog-to-digital (A/D) converter with clamping functions and variable gain, independently programmable for each channel. The clamp timing window is provided by an external pulse or can be generated internally. The TVP7002 includes analog slicing circuitry on the SOG inputs to support sync-on-luminance or sync-on-green extraction. In addition, TVP7002 can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

The TVP7002 also contains a complete horizontal phase-locked loop (PLL) block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 12 MHz to 165 MHz.

All programming of the device is done via an industry-standard I2C interface, which supports both reading and writing of register settings. The TVP7002 is available in a space-saving 100-pin TQFP PowerPAD package.

The TVP7002 is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 165 MHz. Therefore, it can be used for PC graphics digitizing up to the VESA standard of UXGA (1600 × 1200) resolution at a 60-Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080p.

The TVP7002 is powered from 3.3-V and 1.9-V supply and integrates a triple high-performance analog-to-digital (A/D) converter with clamping functions and variable gain, independently programmable for each channel. The clamp timing window is provided by an external pulse or can be generated internally. The TVP7002 includes analog slicing circuitry on the SOG inputs to support sync-on-luminance or sync-on-green extraction. In addition, TVP7002 can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.

The TVP7002 also contains a complete horizontal phase-locked loop (PLL) block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 12 MHz to 165 MHz.

All programming of the device is done via an industry-standard I2C interface, which supports both reading and writing of register settings. The TVP7002 is available in a space-saving 100-pin TQFP PowerPAD package.
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類型 標題 下載最新的英語版本 日期
* 數據表 TVP7002 Triple 8/10-Bit 165/110-MSPS Video and Graphics Digitizer With Horiz PLL 數據表 (Rev. C) 2013年 4月 24日
應用手冊 TVP7002 PCB Layout Guidelines 2010年 6月 16日

設計和開發

如需其他信息或資源，請點擊以下任一標題進入詳情頁面查看（如有）。

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用戶指南: PDF
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軟件編程工具

SLEC023 — TVP7002 Setup Files

支持的產品和硬件

支持的產品和硬件

產品
HDMI、DisplayPort 和 MIPI IC
TVP7002 — 三通道 8/10 位 165/110MSPS 視頻 ADC
支持軟件

SLEC029 — TVP7002 + THS8200 EVM Kit Setup

支持的產品和硬件

支持的產品和硬件

產品
HDMI、DisplayPort 和 MIPI IC
THS8200 — 三通道 10 位全格式視頻 DAC TVP7002 — 三通道 8/10 位 165/110MSPS 視頻 ADC TVP70025I — 具有水平 PLL 的三通道 10 位 90MSPS 視頻和圖形數字轉換器
計算工具

SLEC027 — TVP7002, TVP70025i PLL Worksheet

支持的產品和硬件

支持的產品和硬件

產品
HDMI、DisplayPort 和 MIPI IC
TVP7002 — 三通道 8/10 位 165/110MSPS 視頻 ADC TVP70025I — 具有水平 PLL 的三通道 10 位 90MSPS 視頻和圖形數字轉換器
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用戶指南: PDF
英語版 (Rev.A): PDF
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HTQFP (PZP) 100 Ultra Librarian

訂購和質量

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  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
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