TPS74401-EP

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具有 0.8V 至 3.6V 輸出、快速瞬態響應和可編程軟啟動的 3A LDO 穩壓器(增強型產品)

產品詳情

Rating HiRel Enhanced Product Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (μVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Features Enable, Power good, Soft start Thermal resistance θJA (°C/W) 27 Load capacitance (min) (μF) 0 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -55 to 125
Rating HiRel Enhanced Product Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (μVrms) 13 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Features Enable, Power good, Soft start Thermal resistance θJA (°C/W) 27 Load capacitance (min) (μF) 0 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 115 Operating temperature range (°C) -55 to 125
VQFN (RGW) 20 25 mm2 5 x 5
  • Soft-Start (SS) Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V with External Bias Supply
  • Adjustable Output (0.8 V to 3.6 V)
  • Ultra-Low Dropout: 115 mV at 3.0 A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5 mm × 5 mm × 1 mm QFN Package
  • Active High Enable
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Ranges(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements
    • Hot-Swap and Inrush Controls

(1) Custom temperature ranges available
All other trademarks are the property of their respective owners

  • Soft-Start (SS) Pin Provides a Linear Startup with Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.9 V with External Bias Supply
  • Adjustable Output (0.8 V to 3.6 V)
  • Ultra-Low Dropout: 115 mV at 3.0 A (typ)
  • Stable with Any or No Output Capacitor
  • Excellent Transient Response
  • Available in 5 mm × 5 mm × 1 mm QFN Package
  • Active High Enable
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Ranges(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • APPLICATIONS
    • FPGA Applications
    • DSP Core and I/O Voltages
    • Post-Regulation Applications
    • Applications with Special Start-Up Time or Sequencing Requirements
    • Hot-Swap and Inrush Controls

(1) Custom temperature ranges available
All other trademarks are the property of their respective owners

The TPS74401 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that will meet the sequencing requirements of FPGAs, DSPs, and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the device is fully specified from –55°C to 125°C.

The TPS74401 low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that will meet the sequencing requirements of FPGAs, DSPs, and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors and the device is fully specified from –55°C to 125°C.

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技術文檔

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類型 標題 下載最新的英語版本 日期
* 數據表 3.0A Ultra-LDO With Programmable Soft-Start. 數據表 (Rev. B) 2010年 9月 8日
* VID TPS74401-EP VID V6210611 2016年 6月 21日
* 輻射與可靠性報告 TPS74401MRGWTEP Reliability Report 2011年 10月 26日

設計和開發

如需其他信息或資源,請點擊以下任一標題進入詳情頁面查看(如有)。

參考設計

TIDA-01442 — 使用 ADC12DJ3200 的 L、S、C 和 X 帶的直接射頻采樣雷達接收器參考設計

此參考設計利用 ADC12DJ3200 評估模塊 (EVM) 演示直接射頻采樣接收器,適用于在 HF、VHF、UHF、L、S、C 和部分 X 帶上運行的雷達。模數轉換器 (ADC) 的寬模擬輸入帶寬和高采樣率 (6.4GSPS) 可為單通道或雙通道 ADC 提供多頻帶覆蓋。該 ADC 具有直接射頻采樣功能,取消了對多個降壓轉換級的需求,減少了組件數量,因此降低了系統整體的復雜性。
設計指南: PDF
原理圖: PDF
封裝 引腳 CAD 符號、封裝和 3D 模型
VQFN (RGW) 20 Ultra Librarian

訂購和質量

包含信息:
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
包含信息:
  • 制造廠地點
  • 封裝廠地點

推薦產品可能包含與 TI 此產品相關的參數、評估模塊或參考設計。

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