SCES215Y April 1999 – December 2017 SN74LVC1GU04
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數據表獲取器件具體的封裝圖。
機械數據 (封裝 | 引腳)
- DPW|5
- DBV|5
- DSF|6
- DCK|5
- YZV|4
- DRL|5
- YZP|5
- DRY|6
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
1 Features
- Available in the Texas Instruments
NanoFree™ Package - Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Unbuffered Output
- Maximum tpd of 3.7 ns at 3.3 V
- Low Power Consumption, 10-μA Maximum ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
2 Applications
- AV Receivers
- Blu-ray Players and Home Theaters
- DVD Recorders and Players
- Desktop or Notebook PCs
- Digital Radio or Internet Radio Players
- Digital Video Cameras (DVC)
- Embedded PCs
- GPS: Personal Navigation Devices
- Mobile Internet Devices
- Network Projector Front-Ends
- Portable Media Players
- Pro Audio Mixers
- Smoke Detectors
- Solid-State Drive (SSD): Enterprise
- High-Definition (HDTV)
- Tablets: Enterprise
- Audio Docks: Portable
- DLP Front Projection Systems
- DVR and DVS
- Digital Picture Frame (DPF)
- Digital Still Cameras
3 Description
This single inverter gate is designed for 1.65-V to
5.5-V VCC operation.
The SN74LVC1GU04 device contains one inverter with an unbuffered output and performs the Boolean function Y = A.
NanoFree package technology is a major breakthrough in device packaging concepts, using the die as the package.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN74LVC1GU04DBV | SOT-23 (5) | 2.90 mm × 1.60 mm |
| SN74LVC1GU04DCK | SC70 (5) | 2.00 mm × 1.25 mm |
| SN74LVC1GU04DRL | SOT-5X3 (5) | 1.60 mm × 1.20 mm |
| SN74LVC1GU04DRY | SON (6) | 1.45 mm × 1.00 mm |
| SN74LVC1GU04DSF | SON (6) | 1.00 mm × 1.00 mm |
| SN74LVC1GU04YZP | DSBGA (5) | 1.44 mm × 0.94 mm |
| SN74LVC1GU04YZV | DSBGA (4) | 0.91 mm × 0.91 mm |
| SN74LVC1GU04DPW | X2SON (5) | 0.80 mm × 0.80 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Logic Diagram (Positive Logic)
4 Revision History
Changes from X Revision (November 2017) to Y Revision
- Updated input voltage minimum from 0.5 V to –0.5 V in Absolute Maximum Ratings table.Go
Changes from W Revision (January 2016) to X Revision
- Changed values in the Thermal Information table to align with JEDEC standards.Go
- Updated Feature Description to include more detailed information about specific device features. Go
- Changed Typical Application to oscillator circuit.Go
- Added DPW layout example.Go
Changes from V Revision (November 2013) to W Revision
- Added Applications section, Device Information table, ESD Ratings table, Thermal Information table, Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.Go
Changes from U Revision (June 2011) to V Revision