SCES215Y April 1999 – December 2017 SN74LVC1GU04
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DPW|5
- DBV|5
- DSF|6
- DCK|5
- YZV|4
- DRL|5
- YZP|5
- DRY|6
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
9.1 Application Information
The unbuffered inverter is commonly used in oscillator circuits because it is less sensitive to parameter changes in the oscillator circuit due to having lower total gain than a buffered equivalent. An example application circuit is shown in Figure 5. To learn more about how to use an unbuffered inverter in an oscillator circuit, refer to the Use of the CMOS Unbuffered Inverter in Oscillator Circuits application report.
9.2 Typical Application
Figure 5. Typical Application Diagram
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so routing and load conditions should be considered to prevent ringing.
9.2.2 Detailed Design Procedure
To learn more about how to use an unbuffered inverter in an oscillator circuit, refer to the Use of the CMOS Unbuffered Inverter in Oscillator Circuits application report.
- Recommended Input Conditions
- Specified high and low levels. See (VIH and VIL) in .
- Inputs are overvoltage tolerant allowing them to go as high as (VI max) in at any valid VCC.
- Absolute Maximum Output Conditions
- Load currents must not exceed (IO max) per output and must not exceed (Continuous current through VCC or GND) total current for the part. These limits are located in .
- Outputs must not be pulled above the voltage rated in the .
9.2.3 Application Curve
Figure 6. ICC vs Frequency