3.7 Decoupling Capacitors

Voltages from traces on a printed circuit board can couple to each other in places where it is not desired, (like power supply planes). To decouple the traces, capacitors were added to absorb some of the voltage and help reduce this effect. For more information on how to correctly place decoupling caps, see the Power-Supply Decoupling section in the device-specific data sheet. PLL and some analog supplies benefit from filters or ferrite beads to keep the noise from causing clock jitter. The minimum recommendation is a ferrite bead with a resonance at 100 MHz along with at least one capacitor on the device side of the bead. Additional recommendation is to add one capacitor just before the bead to form a Pi filter. The filter needs to be as close as possible to the device pin, with the device side capacitor being the most important thing to be close to the device pin. PLL pins close together can be combined on the same supply. PLL pins farther away from each other may need their own filtered supply.

Have you verified that your pin labels correspond to the correct pin numbers?

Have you verified that the power pins are connected to the correct supply rails?

Pullups/Pulldowns:

Decoupling capacitors should be no more than 1.25 cm maximum distance from the device power pins to be effective

Recommended decoupling capacitance for the DSP core supplies should be 1 μF in parallel with 0.01-μF capacitor per supply pin

Consider the capacitance of PCB planes

Larger caps for each supply can be placed further away for bulk decoupling

Use high–quality low–ESL/ESR capacitors. For more information, see the Capacitor Theory section in OMAP5910 Decoupling/Filtering Techniques.