SNVA981B November 2020 – December 2024 LM61480-Q1 , LM61480T-Q1 , LM61495-Q1 , LM61495T-Q1 , LM62460-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the LM62460-Q1, LM61480(T)-Q1, and LM61495(T)-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to supply (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the LM62460-Q1, LM61480(T)-Q1, and LM61495(T)-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the LM62460-Q1, LM61480(T)-Q1, and LM61495(T)-Q1 data sheet.
Figure 4-1 Pin DiagramFollowing are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- Application circuit, as per the LM61495-Q1 data sheet is used.
| Pin Name | Pin No | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| PGND2 | 1 | Normal operation. | D |
| VIN2 | 2 | VOUT = 0V. | B |
| RBOOT | 3 | VOUT = 0V, damage if VIN > 5.5V. | A |
| CBOOT | 4 | VOUT = 0V. | B |
| BIAS | 5 | Normal operation. | D |
| VCC | 6 | VOUT = 0V. | B |
| FB | 7 | The device operates at maximum duty cycle. Output voltage rise approximately to the input voltage (VIN) level. Damage to customer load and output stage components are possible. No effect on device. | B |
| AGND | 8 | Normal operation. | D |
| RT | 9 | Switch frequency = 2.2MHz. | C |
| RESET | 10 | RESET value is not valid. VOUT is normal. | D |
| SPSP | 11 | Spread spectrum is off. | C |
| SYNC/MODE | 12 | Mode = Auto PFM at light load. VOUT normal. | C |
| EN | 13 | VOUT = 0V. | B |
| VIN1 | 14 | VOUT = 0V. | B |
| PGND1 | 15 | Normal operation. | D |
| SW | 16 | Damage to high-side FET. | A |
| Pin Name | Pin No | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| PGND2 | 1 | VOUT normal. Current loop is affected, potentially affecting noise, jitter, and EMI reliability. | C |
| VIN2 | 2 | VOUT normal. All currents are in other VIN1 loop, potentially affecting noise, jitter, and EMI reliability. | C |
| RBOOT | 3 | VOUT normal; lower efficiency and higher junction temperature. | C |
| CBOOT | 4 | VOUT = 0V. | B |
| BIAS | 5 | Normal operation. | D |
| VCC | 6 | VCC output can oscillate and internal circuitry not functioning correctly is possible. | B |
| FB | 7 | Output voltage rises to a much higher value than the programmed output voltage. Damage to customer load and output stage components are possible. No effect on device. | B |
| AGND | 8 | Abnormal VOUT is possible due to switching noise on analog circuits. | B |
| RT | 9 | Switch frequency can become unstable. | B |
| RESET | 10 | RESET signal is not valid. Normal operation. | C |
| SPSP | 11 | Spread spectrum enable or disable can be unstable. | C |
| SYNC/MODE | 12 | Mode can switch randomly. Unpredictable behavior. | C |
| EN | 13 | Device can shut off. | B |
| VIN1 | 14 | VOUT normal. All currents are in other VIN2 loop, potentially affecting noise, jitter, EMI, reliability. | C |
| PGND1 | 15 | VOUT normal. Current loop is affected, potentially affecting noise, jitter, and EMI reliability. | C |
| SW | 16 | VOUT = 0V. | B |
| Pin Name | Pin No | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| PGND2 | 1 | VIN2 | VOUT = 0V. Damage to low-side circuitry if PGND is greater than AGND. | B |
| VIN2 | 2 | RBOOT | VOUT = 0V. | B |
| RBOOT | 3 | CBOOT | VOUT normal. | D |
| CBOOT | 4 | BIAS | VOUT = 0V. | B |
| BIAS | 5 | VCC | VCC ESD clamp damaged if BIAS > 5V. | A |
| VCC | 6 | FB | VOUT = 0V. | C |
| FB | 7 | AGND | The device operates at maximum duty cycle. Output voltage rise approximately to the input voltage (VIN) level. Damage to customer load and output stage components are possible. No effect on device. | B |
| AGND | 8 | RT | Switch frequency = 2.2MHz. | C |
| RT | 9 | RESET | Switch frequency can change, RT can become damaged if RESET > 5.5V. Invalid RESET is possible. | B |
| RESET | 10 | SPSP | Spread spectrum can enable or disable; RESET can become damaged if biased above 20V. |
A |
| SPSP | 11 | SYNC/MODE | Spread spectrum, sync, and mode functionality can be unstable. | C |
| SYNC/MODE | 12 | EN | Can disable device, change modes, or interrupt syncing. | B |
| EN | 13 | VIN1 | Device enabled. | B |
| VIN1 | 14 | PGND1 | VOUT = 0V. Damage to low-side circuitry if PGND is greater than AGND. | B |
| PGND1 | 15 | SW | VOUT = 0V. Damage to low-side circuitry if PGND is greater than AGND. | B |
| SW | 16 | PGND2 | Damage to high-side FET. | A |
| Pin Name | Pin No | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| PGND2 | 1 | VOUT = 0V. Damage to low-side circuitry if PGND is greater than AGND. | B |
| VIN2 | 2 | Normal operation. | D |
| RBOOT | 3 | VOUT = 0V. RBOOT ESD clamp runs current to destruction. | A |
| CBOOT | 4 | VOUT = 0V. CBOOT ESD clamp runs current to destruction. | A |
| BIAS | 5 | If VIN exceeds 16V, damage occurs; if VIN is below 16V, normal operation. | A |
| VCC | 6 | If VIN exceeds 5.5V, damage occurs. | A |
| FB | 7 | If VIN exceeds 16V (fixed version), or 5.5V (adjustable version), damage occurs. VOUT = 0V. | A |
| AGND | 8 | VOUT = 0V. Damage to other pins referred to GND. | A |
| RT | 9 | If VIN exceeds 5.5V, damage occurs. VOUT = 0V. | A |
| RESET | 10 | If VIN exceeds 20V, damage occurs. VOUT = 0V. | A |
| SPSP | 11 | Spread spectrum enabled. | D |
| SYNC/MODE | 12 | Mode set to FPWM. | C |
| EN | 13 | Device enabled. | C |
| VIN1 | 14 | Normal operation. | D |
| PGND1 | 15 | VOUT = 0V. Damage to the low-side circuitry if PGND is greater than AGND. | B |
| SW | 16 | Damage to low-side FET. | A |