SLUUC54C February 2020 – March 2024 BQ27Z558 , BQ27Z561 , BQ27Z561-R2
| Class | Subclass | Name | Type | Min | Max | Default | Unit | Description |
|---|---|---|---|---|---|---|---|---|
| Settings | Configuration | IO Config | H1 | 0x00 | 0x3C | 0x00 | — | Bit 0: BTP_EN 0 = Disables assertion of the INT pin when BTP is triggered 1 = Enables assertion of the INT pin when BTP is triggered Bit 1: = BTP_SRC 0 = BTP interrupts use capacity-based thresholds 1 = BTP interrupts use RSOC-based thresholds Bit 2: INT_EN 0 = Disables interrupt function on pin INT 1 = Enables interrupt function on pin INT Bit 3: INT_POL 0 = Interrupt (INT) is active LOW. 1 = Interrupt (INT) is active HIGH. Bit 4: INT_PUP 0 = Interrupts on the INT pin are open-drain type (pull up required), 1 = Interrupts on the INT pin are push-pull type (internal pull up used), Bit 5: INT_TYPE 0 = Interrupts enabled on INT pin as level-type 1 = Interrupts enabled on INT pin as pulse-type Bit 6: GPIO_POL 0 = Pulse (PULS) is active LOW. 1 = Pulse (PULS) is active HIGH. Bit 7: GPIO_LEVEL_EN 0 = Pulse (PULS) is pulse only. 1 = Pulse (PULS) is level set. |