8.3.3.1 Improved Performance with UCC28630 and UCC28633

In order to reduce standby power and eliminate the standing loss associated with the conventional discharge resistors, the UCC28630 and the UCC28633 devices incorporate active X-capacitor discharge circuitry. This circuit periodically monitors the voltage across the X-capacitor to detect any possible DC-condition (which would indicate that AC mains disconnection has occurred), and then discharges the voltage across the X-capacitor using the internal HV current source. The X-capacitor discharge function discharges the X-capacitor to the SELV 60-V level in 1 s (as long as the design considerations discussed in this section are followed).

The size of the X-capacitor that can be discharged depends on the VDD energy storage capacitor. Assuming the worst case, a maximum X-capacitor disconnect voltage could be at the peak of 264 V_RMS, and assuming that it should be discharged down to 60-V SELV level, the minimum allowed VDD capacitor can be sized based on the worst case V_DD(reset) and V_DD(start) levels as described in Equation 3.

Equation 3.

For example, for a 330-nF X-capacitor value, the required VDD capacitor is 15.9 µF, so a 22-µF capacitor suffices.

Equation 4.

In order to reduce the power consumption from the high voltage AC line, the device pulses current into the HV pin at a low frequency with very low duty-cycle. The HV current source on-time (t_ON(HV)) , repeats at intervals of t_SMP(HV). Moreover, the pulsing occurs in bursts, with a time delay between bursts. The sampling occurs in bursts of 21, at intervals of t_SMP(HV), with a wait time of t_WAIT(HV) between bursts. This reduces the effective average duty-cycle to a very low value (approximately 0.2%), and minimizes the overhead of X-capacitor sampling current and device bias consumption overhead to approximately 2 mW of extra standby consumption at high-line 230 V_AC.

The device enables the X-capacitor monitor in latched fault mode, and in light-load regions where the power level is below P_LL(%), as a percentage of the nominal rated level. Above the P_LL(%) level, the X-capacitor monitor is disabled. At this load level the bulk capacitor discharges at a rate that is sufficient to also discharge the X-capacitor, which appears in parallel with the bulk capacitor once the bulk voltage drops far enough to forward bias the bridge rectifier diodes. In this case ensure that the bulk capacitance value is not too large for the power level desired, which in-turn ensures that the bulk capacitor discharge rate is fast enough to discharge the X-capacitor to meet the 1-s discharge target. This can be calculated in Equation 5.

Equation 5.

Assuming a worst case AC disconnect at the peak at 264 V_RMS (373 V_PK), and a requirement to discharge to SELV level of 60 V in t_XCAP(dis) of 1 s, for a P_NOM of 65 W at 87% efficiency, this is calculated in Equation 6.

Equation 6.

Once the bulk capacitance value is chosen, also ensure that when the bulk capacitor has been discharged down to the line UV AC_OFF threshold, that it continues to discharge to an acceptable level during the line UV persistence delay time (t_UV(delay)) as shown in Equation 7.

Equation 7.

Again, taking the example above:

Equation 8.

Once the first constraint is satisfied, the second one is also automatically met.

Figure 19. X-Capacitor Discharge Activation, at 230 V_AC, No Load
(red = X-capacitor, blue = bulk-capacitor, both 100 V/div)

Figure 20. X-Capacitor Decay Rate Without Active Discharge
(time constant dominated by 20-MΩ probe impedance)
(red = X-capacitor, blue = bulk-capacitor, both 100 V/div)