ZHCSH10B October 2017 – August 2018 UCC27710
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Selecting HI and LI Low Pass Filter Components (RHI, RLI, CHI, CLI)
- 8.2.2.2 Selecting Bootstrap Capacitor (CBOOT)
- 8.2.2.3 Selecting VDD Bypass/Holdup Capacitor (CVDD) and Rbias
- 8.2.2.4 Selecting Bootstrap Resistor (RBOOT)
- 8.2.2.5 Selecting Gate Resistor RON/ROFF
- 8.2.2.6 Selecting Bootstrap Diode
- 8.2.2.7 Estimate the UCC27710 Power Losses (PUCC27710)
- 8.2.2.8 Estimating Junction Temperature
- 8.2.2.9 Operation With IGBT's
- 8.2.3 Application Curves
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
8.2.2.8 Estimating Junction Temperature
The junction temperature can be estimated with:
where
- TC is the UCC27710 case-top temperature measured with a thermocouple or some other instrument. and
- ?JT is the junction-to-top characterization parameter from the Thermal Information table.
Using the junction-to-top characterization parameter (?JT) instead of the junction-to-case thermal resistance (RθJC) can greatly improve the accuracy of estimating the junction temperature. The majority of the power dissipation of most devices is released into the PCB through the package leads, whereas only a small percentage of the total dissipation is released through the top of the case (where thermocouple measurements are usually taken). RθJC can only be used effectively when most of the thermal energy is released through the case, such as with metal packages or a heatsink is applied to the device package. In other cases RθJC will inaccurately estimate the true junction temperature of the device. ?JT is experimentally derived by assuming the amount of thermal energy dissipated through the top of the device will be similar in both the testing environment and the application environment. As long as the recommended layout guidelines are observed, junction temperature can be estimated accurately to within a few degrees Celsius. For more information, see the Semiconductor and IC Package Thermal Metrics application report.
Additional Considerations: In the application example schematic there are 10-kΩ resistors across the gate and source terminals of FET Q1 and Q2. These resistors are placed across these nodes to ensure FETs Q1 and Q2 are not turned on if the UCC27710 is not in place or properly soldered to the circuit board or if UCC27710 is in an unbiased state.