ZHCSKO8C June 2021 – January 2022 UCC27614
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Applications and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DSG|8
訂購信息
7.3.1 VDD Undervoltage Lockout
The UCC27614 device offers an undervoltage lockout threshold of 4 V. The device's hysteresis range helps to avoid any chattering due to the presence of noise on the bias supply. 0.3 V of typical UVLO hysteresis is expected for 4-V UVLO devices. There is no significant driver output turnon delay due to the UVLO feature, and 5 μs of UVLO delay is expected. The UVLO turn-off delay is also minimized as much as possible. The UVLO delay is designed to minimize chattering that may occur due to very fast transients that may appear on VDD. When the bias supply is below UVLO thresholds, the outputs are held actively low irrespective of the state of input pins and enable pin. The device accepts a wide range of slew rates on its VDD pin, and VDD noise within the hysteresis range does not affect the output state of the driver (neither ON nor OFF).
Figure 7-1 Power Up