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ZHCSBJ1B August 2013 – August 2015 UCC27517A-Q1

PRODUCTION DATA.

封裝選項

請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機械數(shù)據(jù) (封裝 | 引腳)

DBV|5

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾⁽³⁾

		MIN	MAX	UNIT
Supply voltage	V_DD	–0.3	20	V
OUT voltage	DC	–0.3	V_DD + 0.3	V
OUT voltage	Repetitive pulse less than 200 ns⁽⁵⁾	–2	V_DD + 0.3	V
Output continuous current	I_{OUT_DC}(source/sink)		0.3	A
Output pulsed current (0.5 µs)	I_{OUT_pulsed} (source/sink)		4	A
Input voltage	IN+, IN–⁽⁴⁾	–6	20	V
Operating virtual junction temperature, T_J		–40	150	°C
Storage temperature, T_STG		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. See Packaging Section of the datasheet for thermal limitations and considerations of packages.

(3) These devices are sensitive to electrostatic discharge; follow proper device-handling procedures.

(4) Maximum voltage on input pins is not restricted by the voltage on the V_DD pin.

(5) Values are verified by characterization on bench.

8.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾	±2500	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per AEC Q100-011	±1500	V

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	NOM	MAX	UNIT
Supply voltage, V_DD	4.5	12	18	V
Operating ambient temperature	–40		140	°C
Input voltage, IN+ and IN–	0		18	V

8.4 Thermal Information

THERMAL METRIC⁽¹⁾		UCC27517A-Q1	UNIT
		DBV (SOT-23)
		5 PINS
R_θJA	Junction-to-ambient thermal resistance	216	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	136.6	°C/W
R_θJB	Junction-to-board thermal resistance	43.4	°C/W
ψ_JT	Junction-to-top characterization parameter	20.5	°C/W
ψ_JB	Junction-to-board characterization parameter	42.6	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	N/A	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

8.5 Electrical Characteristics

V_DD = 12 V, T_A = –40°C to 140°C, 1-µF capacitor from V_DD to GND. Currents are positive into, negative out of the specified terminal.

PARAMETER		TEST CONDITION		MIN	TYP	MAX	UNIT
BIAS CURRENTS
I_DD(off)	Startup current	V_DD = 3.4 V	IN+ = V_DD, IN– = GND	40	100	160	µA
			IN+ = IN– = GND or IN+ = IN– = V_DD	25	75	145
			IN+ = GND, IN– = V_DD	20	60	115
UNDER VOLTAGE LOCKOUT (UVLO)
V_ON	Supply start threshold	T_A = 25°C		3.91	4.20	4.5	V
V_ON	Supply start threshold	T_A = –40°C to 140°C		3.70	4.20	4.65	V
V_OFF	Minimum operating voltage after supply start			3.45	3.9	4.35	V
V_DD_H	Supply voltage hysteresis			0.2	0.3	0.5	V
INPUTS (IN+, IN–)
V_{IN_H}	Input signal high threshold	Output high for IN+ pin, Output low for IN– pin			2.2	2.4	V
V_{IN_L}	Input signal low threshold	Output low for IN+ pin, Output high for IN– pin		1	1.2		V
V_{IN_HYS}	Input signal hysteresis				1		V
SOURCE/SINK CURRENT
I_SRC/SNK	Source/sink peak current⁽¹⁾	C_LOAD = 0.22 µF, F_SW = 1 kHz			±4		A
OUTPUTS (OUT)
V_DD–V_OH	High output voltage	V_DD = 12 V, I_OUT = –10 mA			50	90	mV
V_DD–V_OH	High output voltage	V_DD = 4.5 V, I_OUT = –10 mA			60	130	mV
V_OL	Low output voltage	V_DD = 12, I_OUT = 10 mA			5	10	mV
V_OL	Low output voltage	V_DD = 4.5 V, I_OUT = 10 mA			6	12	mV
R_OH	Output pullup resistance⁽¹⁾	V_DD = 12 V, I_OUT = –10 mA			5	7.5	Ω
R_OH	Output pullup resistance⁽¹⁾	V_DD = 4.5 V, I_OUT = –10 mA			5	11	Ω
R_OL	Output pulldown resistance	V_DD = 12 V, I_OUT = 10 mA			0.5	1	Ω
R_OL	Output pulldown resistance	V_DD = 4.5 V, I_OUT = 10 mA			0.6	1.2	Ω

(1) Ensured by Design.

(2) See timing diagrams in Figure 1, Figure 2, Figure 3 and Figure 4.

8.6 Switching Characteristics

V_DD = 12 V, T_A = –40°C to 140°C, 1-µF capacitor from V_DD to GND. Currents are positive into, negative out of the specified terminal.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SWITCHING TIME
t_R	Rise time⁽²⁾	V_DD = 12 V, C_LOAD = 1.8 nF		8	12	ns
t_R	Rise time⁽²⁾	V_DD = 4.5 V, C_LOAD = 1.8 nF		16	22	ns
t_F	Fall time⁽²⁾	V_DD = 12 V, C_LOAD = 1.8 nF		7	11	ns
t_F	Fall time⁽²⁾	V_DD=4.5V, C_LOAD = 1.8 nF		7	11	ns
t_D1	IN+ to output propagation delay⁽²⁾	V_DD = 12 V, 5-V input pulse, C_LOAD = 1.8 nF	4	13	23	ns
t_D1	IN+ to output propagation delay⁽²⁾	V_DD = 4.5 V, 5-V input pulse, C_LOAD = 1.8 nF	4	15	26	ns
t_D2	IN– to output propagation delay⁽²⁾	V_DD = 12 V, C_LOAD = 1.8 nF	4	13	23	ns
t_D2	IN– to output propagation delay⁽²⁾	V_DD = 4.5 V, C_LOAD = 1.8 nF	4	19	30	ns