日韩和欧美一级特黄大片,久久久不卡网国产精品视频,少妇人妻88久久中文字幕

ZHCSNM5C november 2020 – august 2023 UCC25800-Q1

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

DGN|8
- MPDS046G

散熱焊盤機械數據 (封裝 | 引腳)

DGN|8
- PPTD362B

訂購信息

7.5 Electrical Characteristics

Unless otherwise stated: V_VCC = 15 V, R_RT = open, C_VREG = 470 nF, and -40 °C <T_J =T_A < 125 °C

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY VOLTAGE
UVLO_R	VCC turn on threshold	VCC rising	8	8.6	9	V
UVLO_F	VCC turn off threshold	VCC falling	7.5	8	8.5	V
OV_SD	VCC overvoltage shutdown threshold	VCC rising	35	37	39	V
OV_RS	VCC overvoltage reset	VCC falling	34	36	38	V
OV_BLNK	Overvoltage blanking time	V_VCC = 40 V	0.75	1.3	2	μs
SUPPLY CURRENT
IVCC_UVLO	VCC current during UVLO	V_VCC = 7.5 V		200	500	μA
IVCC_RUN	Input current, not including FET current ⁽³⁾	f_SW = 1.2 MHz, DIS/FLT = 1, SW open, I_VREG = 0 mA, VCC = 12 V		14	20	mA
IVCC_DIS	Supply current when disabled	No switching, DIS/FLT = 0, I_VREG = 0 mA		660	800	μA
VREG OUTPUT
VREG	Internal regulated reference	I_VREG = 0 mA, DIS/FLT = 0	4.75	5	5.25	V
VREG_LINE	Line Regulation	I_VREG = 0 mA, 9 V ≤ V_VCC ≤ 34 V			10	mV
VREG_LOAD	Load Regulation	0 mA ≤ I_VREG ≤ 1 mA	-100			mV
VREG_OK	Threshold for VREG GOOD	VREG rising	4.05	4.5	4.95	V
VREG_LOW	VREG fault threshold	VREG falling	3.6	4	4.4	V
MOSFETs
RDSON	On Resistance	PMOS I_SW = -500 mA		0.45	0.75	Ω
RDSON	On Resistance	NMOS I_SW = +500 mA		0.3	0.5	Ω
OSCILLATOR
f_SW	SW switching frequency	V_RT = 0.25 V	94	100	106	kHz
		V_RT = 2.5 V	0.94	1	1.06	MHz
		Default switching frequency, RT open	1.128	1.2	1.272	MHz
f_SWtol	Tolerance	10 k? ≤ R_RT ≤ 100 k?	94		106	%
Duty	Duty cycle	RT open	49	50	51	%
RT_SHORT	Short circuit fault theshold		130	150	170	mV
RT_OPEN	Open-circuit default f_OSC threshold		2.9	3	3.1	V
SYNC
SYNC_RISNG	SYNC rising threshold	V_SYNC rising	2.0	2.2	2.4	V
SYNC_FALLING	SYNC falling threshold	V_SYNC falling	1.53	1.7	1.87	V
ADAPTIVE DEAD-TIME
DT_HS_TH	High-side dead-time detection threshold with respect to VCC	SW rising	-1.2	-1	-0.8	V
DT_LS_TH	Low-side dead-time detection threshold	SW falling	0.8	1	1.2	V
DT_HS_DELAY	High-side turn on delay	From SW crossing DT_HS_TH to HS turning on		20	45	ns
DT_LS_DELAY	Low-side turn on delay	From SW crossing DT_LS_TH to LS turning on		20	45	ns
PROGRAMMABLE MAXIMUM DEAD-TIME
OC/DT_SHORT	short threshold for OC/DT pin		450	500	550	mV
OC/DT_OPEN	open threshold for OC/DT pin		4.3	4.5	4.7	V
DT_MAX	Programmable maximum dead-time	V_OC/DT = 3.9 V	45	50	55	ns
DT_MAX	Programmable maximum dead-time	V_OC/DT = 1.9 V	135	150	165	ns
OVER-CURRENT PROTECTION
I_OCP1max	First level maximum OCP setting threshold	Low side only	0.9	1	1.1	A
OCP1_TO	OCP1 time out	Peak current exceeds threshold time out to trigger OCP1 fault	1.9	2.1	2.3	ms
I_OCP2max	Second level maximum OCP threshold	Low side and high side	4.25	5	5.75	A
OCP2_FILTER	OCP2 filter time	Continuous over-current to trigger OCP2 fault, low side and high side	80	100	120	ns
OVER-TEMPERATURE PROTECTION
TSD	Thermal shutdown threshold	T_J = T_A⁽¹⁾		160		°C
T_HYST	Hysteresis	T_J = T_A⁽¹⁾		20		°C
ENABLE_DISABLE FUNCTION
EN_TH	Enable threshold	DIS/FLT rising	2	2.2	2.4	V
DIS_TH	Disable threshold	DIS/FLT falling	1.53	1.7	1.87	V
I_{pd_DIS}	Internal pull down disable current	V_DIS/FLT = 5 V	650	750	850	μA
RESTART_DEL	Restart delay after fault ⁽²⁾			100		ms

(1) Specified by design. No production tested.

(2) Specified by bench characterization. No production tested.

(3) This current includes the SW pin parasitic capaticor charge and discharge current. When operating with LLC, soft switching removes the capacitor charge and discharge current. Actual current is smaller.