SLUSFF3A January 2024 – June 2024 UCC21330-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tRISE | Output Rise Time | CL=1.8nF, VDDx=12V, 20% to 80% | 8 | ns | ||
| CL=1.8nF, VDDx=25V, 20% to 80% | 8 | |||||
| tFALL | Output Fall Time | CL=1.8nF, VDDx=12V, 10% to 90% | 8 | ns | ||
| CL=1.8nF, VDDx=25V, 10% to 90% | 8 | |||||
| tPDLH | Propagation Delay – Low to High | Input Pulse Width = 100ns, 500kHz, measure with Input VIH to output 10% | 26 | 33 | 45 | ns |
| tPDHL | Propagation Delay – High to Low | Input Pulse Width = 100ns, 500kHz, measure with Input VIL to output 90% | 26 | 33 | 45 | ns |
| tPD_DIS_HL | DIS Response Delay – High to Low | tEN/DIS_FIL = 20 ns (typ), VDD=VDD_ON+0.2V and above, Input Pulse Width = 100ns, 500kHz |
27 | 48 | 80 | ns |
| tPD_DIS_LH | DIS Response Delay – Low to High | 27 | 48 | 80 | ns | |
| tPWmin | Minimum Input Pulse Width That Passes to Output | VDD=VDD_ON+0.2V and above | 4 | 12 | 30 | ns |
| tDM | Propagation Delay Matching for Dual Channel Driver | Input Pulse Width = 100ns, 500kHz, TJ = –40°C to -10°C |tPDLHA – tPDLHB|, |tPDHLA – tPDHLB| |
0 | 6.5 | ns | |
| Input Pulse Width = 100ns, 500kHz, TJ = –10°C to +150°C |tPDLHA – tPDLHB|, |tPDHLA – tPDHLB| |
0 | 5 | ns | |||
| tPWD | Pulse Width Distortion | Input Pulse Width = 100ns, 500kHz |tPDLHA – tPDHLA|, |tPDLHB– tPDHLB| |
0 | 5 | ns | |
| |CMH| | High-level Common Mode Transient Immunity | VCM = 1500V | 125 | V/ns | ||
| |CML| | Low-level Common Mode Transient Immunity | 125 | V/ns | |||