ZHCSH68G November 2017 – November 2024 UCC21220 , UCC21220A
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tRISE | Output rise time, see Figure 7-4 | CVDD = 10 μF, COUT = 1.8 nF, VVDDA, VVDDB = 12 V, f = 1 kHz |
8 | ns | ||
| tFALL | Output fall time, see Figure 7-4 | CVDD = 10 μF, COUT = 1.8 nF , VVDDA, VVDDB = 12 V, f = 1 kHz |
8 | ns | ||
| tPWmin | Minimum input pulse width that passes to output, see Figure 7-1 and Figure 7-2 |
Output does not change the state if input signal less than tPWmin | 4 | 12 | 30 | ns |
| tPDHL | Propagation delay at falling edge, see Figure 7-3 | INx high threshold, VINH, to 10% of the output | 26 | 33 | 45 | ns |
| tPDLH | Propagation delay at rising edge, see Figure 7-3 | INx low threshold, VINL, to 90% of the output | 26 | 33 | 45 | ns |
| tPWD | Pulse width distortion in each channel, see Figure 7-3 | |tPDLHA – tPDHLA|, |tPDLHB– tPDHLB| | 5 | ns | ||
| tDM | Propagation delays matching, |tPDLHA – tPDLHB|, |tPDHLA – tPDHLB|, see Figure 7-3 |
Input
Pulse Width = 100ns, 500kHz, TJ = -40°C to -10°C |tPDLHA – tPDLHB|, |tPDHLA – tPDHLB| |
6.5 | ns | ||
| Input Pulse Width = 100ns, 500kHz, TJ = -10°C to
+150°C |tPDLHA – tPDLHB|, |tPDHLA – tPDHLB| |
5 | ns | ||||
| tVCCI+ to OUT | VCCI
Power-up Delay Time: UVLO Rise to OUTA, OUTB, See Figure 7-6 |
INA or INB tied to VCCI | 18 | 42 | 80 | μs |
| tVDD+ to OUT | VDDA,
VDDB Power-up Delay Time: UVLO Rise to OUTA, OUTB See Figure 7-7 |
INA or INB tied to VCCI | 10 | |||
| |CMH| | High-level common-mode transient immunity (See Section 7.6) | Slew rate of GND vs. VSSA/B, INA and INB both are tied to GND or VCCI; VCM=1000 V; | 125 | V/ns | ||
| |CML| | Low-level common-mode transient immunity (See Section 7.6) | Slew rate of GND vs. VSSA/B, INA and INB both are tied to GND or VCCI; VCM=1000 V; | 125 | |||