10 Revision History
Changes from Revision P (August 2023) to Revision Q (March 2024)
- Added text "The recommended 1.1-V and 3.3-V power supply ramp time
is greater than or equal to 1 ms (measured from 0% to 100%)" to the Power-Up
Sequence section Go
Changes from Revision O (August 2023) to Revision P (August 2023)
- Updated the Reference Design 1 figure to correct the pin name
for A4 and B8Go
Changes from Revision N (August 2022) to Revision O (August 2023)
- 更新了器件信息 表的格式以包含 USB 端口計(jì)數(shù)Go
- Updated the Power-Up Sequence figure to have VDD11 supply
ramp after VDDA_3P3 and VDD33 Go
Changes from Revision M (July 2015) to Revision N (August 2022)
- 更新了應(yīng)用 部分Go
- 更新了整個(gè)文檔中的表格、圖和交叉參考的編號(hào)格式Go
- 更新了數(shù)據(jù)表以包含豐富的術(shù)語(yǔ)Go
- Change recommended VDD11 minimum to 1.045 V from 0.99
VGo
- Added the 1.1 V ?5% / +10% supply is recommended footnote for
VDD11Go
- Changed the pin name for B8 in the Reference Design 1 figure from:
VDD11 to: NC
Go
Changes from Revision L (August 2013) to Revision M (July 2015)
- 添加了引腳配置和功能、ESD 等級(jí)、特性說(shuō)明、器件功能模式、應(yīng)用和實(shí)施、電源相關(guān)建議、布局、器件和文檔支持，以及機(jī)械、封裝和可訂購(gòu)信息 部分Go
- Deleted from Section Clock Source Requirements part of the paragraph; -50 MHz.
Changed supported Crystal value to 24 MHZ and 48 MHz Go
- Deleted the first ItemizedList under Two-Wire Serial-Bus Interface section Go
- Deleted part of sentence from Table 112. in bit row 30, description; 'with the PLL....SEL field.Go
- Deleted the Description from Table 112, in row 29:24 and replaced with Reserved also, replaced rw with w in same row Go
Changes from Revision K (March 2011) to Revision L (May 2013)
- Added text "If a 48 MHz reference clock is used instead of a
crystal, GRST# must remain asserted until the 48 MHz clock is
stable"Go
- Added text - "If a 48 MHz reference clock is used instead of a
crystal, GRST# must remain asserted until the 48 MHz clock is
stable"Go
- Replaced the Power Up Sequence imageGo