ZHCSG75E April 2017 – April 2018 TUSB544
PRODUCTION DATA.
Figure 21. Power-Up Timing | PARAMETER | MIN | MAX | UNIT | |
|---|---|---|---|---|
| Td_pg | VCC (min) to Internal Power Good asserted high | 500 | µs | |
| Tcfg_su | CFG(1) pins setup (2) | 350 | µs | |
| Tcfg_hd | CFG(1) pins hold | 10 | µs | |
| TCTL_DB | CTL[1:0] and FLIP pin debounce | 16 | ms | |
| TVCC_RAMP | VCC supply ramp requirement | 100 | ms | |