ZHCSLS0B July 2022 – April 2024 TPS929240-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1 Device Bias and Power
- 6.3.2 Constant Current Output
- 6.3.3 PWM Dimming
- 6.3.4 FAIL-SAFE State Operation
- 6.3.5 On-Chip, 8-Bit, Analog-to-Digital Converter (ADC)
- 6.3.6
Diagnostic and Protection in NORMAL State
- 6.3.6.1 VBAT Undervoltage Lockout Diagnostics in NORMAL state
- 6.3.6.2 Low-Supply Warning Diagnostics in NORMAL State
- 6.3.6.3 Supply Undervoltage Diagnostics in NORMAL State
- 6.3.6.4 Reference Diagnostics in NORMAL state
- 6.3.6.5 Pre-Thermal Warning in NORMAL state
- 6.3.6.6 Overtemperature Protection in NORMAL state
- 6.3.6.7 Overtemperature Shutdown in NORMAL state
- 6.3.6.8 LED Open-Circuit Diagnostics in NORMAL state
- 6.3.6.9 LED Short-Circuit Diagnostics in NORMAL state
- 6.3.6.10 Single-LED Short-Circuit Detection in NORMAL state
- 6.3.6.11 EEPROM CRC Error in NORMAL state
- 6.3.6.12 Communication Loss Diagnostic in NORMAL State
- 6.3.6.13 Fault Masking in NORMAL state
- 53
- 6.3.7
Diagnostic and Protection in FAIL-SAFE states
- 6.3.7.1 Supply Undervoltage Lockout Diagnostics in FAIL-SAFE states
- 6.3.7.2 Low-Supply Warning Diagnostics in FAIL-SAFE states
- 6.3.7.3 Supply Undervoltage Diagnostics in FAIL-SAFE State
- 6.3.7.4 Reference Diagnostics in FAIL-SAFE states
- 6.3.7.5 Pre-Thermal Warning in FAIL-SAFE state
- 6.3.7.6 Overtemperature Protection in FAIL-SAFE state
- 6.3.7.7 Overtemperature Shutdown in FAIL-SAFE state
- 6.3.7.8 LED Open-Circuit Diagnostics in FAIL-SAFE state
- 6.3.7.9 LED Short-Circuit Diagnostics in FAIL-SAFE state
- 6.3.7.10 Single-LED Short-Circuit Detection in FAIL-SAFE state
- 6.3.7.11 EEPROM CRC Error in FAIL-SAFE State
- 6.3.7.12 Fault Masking in FAIL-SAFE state
- Diagnostics Table in FAIL-SAFE State
- 6.3.8 OFAF Setup In FAIL-SAFE state
- 6.3.9 ERR Output
- 6.4 Device Functional Modes
- 6.5 Programming
- 6.6 Register Maps
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DCP|38
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DCP|38
訂購信息
6.3.9 ERR Output
The ERR pin is a programmable fault indicator pin. This pin can be used as an interrupt output to master controller in case there is any fault in NORMAL state. In FAIL-SAFE states, the ERR pin can be used as an output to other ERR pin of other TPS929240-Q1 to achieve one-fails-all-fail at system level. The ERR pin is an open-drain output with current limit up to IPD(ERR). TI recommends a < 10-kΩ external pullup resistor from the ERR pin to the same IO voltage of the master controller.
In NORMAL state, when a fault is triggered, depending on the fault type, the ERR pin is either pulled down constantly or pulled down for a single pulse. After an ERR output is triggered, the master controller must take action to deal with the failure and reset the fault flag. For non-critical faults, the TPS929240-Q1 pulls down the ERR pin with a duration of 50 μs and release; for critical faults, device constantly pulls down ERR as described in Table 6-6. In NORMAL state, basically, the TPS929240-Q1 only reports the faults to the master controller for most of the failure and takes no actions except supply or LDO UVLO, reference fault, and overtemperature. The master controller determines what action to take according to the type of the failure.
The TPS929240-Q1 provides a forced-error feature to validate the error feedback-loop integrity in NORMAL state. In NORMAL state, if the microcontroller sets FORCEERR to 1, the FLAG_ERR is set 1 and pulls down ERR output with a pulse of 50 μs accordingly. The FORCEERR automatically returns to 0.
In FAIL-SAFE states, the ERR pin is used as fault bus. When there is any output failure reported, the ERR is pulled down by internal current sink IPD(ERR). The TPS929240-Q1 monitors the voltage of the ERR pin. If the one-fails-all-fail diagnostics is enabled by setting register OFAF to 1, all current output channels are turned off, as well as diagnostics, when the ERR pin voltage is low. If register OFAF is 0, the device only turns off the failed channel with alive channels diagnostics enabled.
| OFAF = 1 | OFAF = 0 | |
|---|---|---|
| ERR pulled low internally | All OUT channel OFF except failure detected OUT retries every 10 ms | Only failure detected OUT OFF |
| ERR pulled low externally | All OUT channel OFF | All OUT channel ON |
If multiple TPS929240-Q1 devices are used in one application, tying the ERR pins together achieves the one-fails-all-fail behavior in FAIL-SAFE states without master controlling. Any one of TPS929240-Q1 reports fault by pulling the ERR pin to low, and the low voltage on ERR bus is detected by other TPS929240-Q1 as Figure 6-8 illustrated. If the register OFAF is set to 1 for all TPS929240-Q1 devices having the ERR pins tied together, all TPS929240-Q1 devices turn off current for all output channels.
Figure 6-8 ERR Internal
Block Diagram