ZHCSLS0B July 2022 – April 2024 TPS929240-Q1
PRODUCTION DATA
請參考 PDF 數據表獲取器件具體的封裝圖。
Each FlexWire bus supports maximum 16 slave devices. The TPS929240-Q1 has three pinouts including ADDR2, ADDR1, and ADDR0 for slave address configuration. There are additional 4-bit EEPROM register to program the slave address of the TPS929240-Q1. The register INTADDR sets the device slave address by either address pins setup or internal EEPROM register code.
If INTADDR is 1, the device uses the binary code in register DEVADDR[3:0] as slave address as shown in the below table.
If INTADDR is 0, the device uses DEVADDR[3] code together with external inputs on ADDR2, ADDR1 and ADDR0 as shown in the below table and ignore DEVADDR[2:0] code.
The address 0h to Fh can be used as slave address for up to 16 pieces of TPS929240-Q1 in the same FlexWire bus. Do not have two TPS929240-Q1 sharing the same slave address either setting by internal register DEVADDR or address pins configuration on ADDR2, ADDR1 and ADDR0.
The default value for DEVADDR[3:0] is 0h.
| Address(HEX) | INTERNAL ADDRESS SETTING | EXTERNAL ADDRESS SETTING | ||||||
|---|---|---|---|---|---|---|---|---|
| BIT3 | BIT2 | BIT1 | BIT0 | BIT3 | BIT2 | BIT1 | BIT0 | |
| DEVADDR[3] | DEVADDR[2] | DEVADDR[1] | DEVADDR[0] | DEVADDR[3] | ADDR2 | ADDR1 | ADDR0 | |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 |
| 2 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| 3 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
| 4 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 |
| 5 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
| 6 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
| 7 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 |
| 8 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| 9 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
| A | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 |
| B | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 |
| C | 1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 |
| D | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 |
| E | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 |
| F | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |