The ERR pin is a programmable fault indicator pin. This pin can be used as an interrupt output to master controller in case there is any fault in NORMAL state. In FAIL-SAFE states, the ERR pin can be used as an output to other ERR pin of other TPS929160-Q1 to achieve one-fails-all-fail at system level. The ERR pin is an open-drain output with current limit up to I_PD(ERR). TI recommends a < 10-kΩ external pullup resistor from the ERR pin to the same IO voltage of the master controller.

In NORMAL state, when a fault is triggered, depending on the fault type, the ERR pin is either pulled down constantly or pulled down for a single pulse. After an ERR output is triggered, the master controller must take action to deal with the failure and reset the fault flag. For non-critical faults, the TPS929160-Q1 pulls down the ERR pin with a duration of 50 μs and release; for critical faults, device constantly pulls down ERR as described in Table 6-6. In NORMAL state, basically, the TPS929160-Q1 only reports the faults to the master controller for most of the failure and takes no actions except supply or LDO UVLO, reference fault, and overtemperature. The master controller determines what action to take according to the type of the failure.

The TPS929160-Q1 provides a forced-error feature to validate the error feedback-loop integrity in NORMAL state. In NORMAL state, if the microcontroller sets FORCEERR to 1, the FLAG_ERR is set 1 and pulls down ERR output with a pulse of 50 μs accordingly. The FORCEERR automatically returns to 0.

In FAIL-SAFE states, the ERR pin is used as fault bus. When there is any output failure reported, the ERR is pulled down by internal current sink I_PD(ERR). The TPS929160-Q1 monitors the voltage of the ERR pin. If the one-fails-all-fail diagnostics is enabled by setting register OFAF to 1, all current output channels are turned off, as well as diagnostics, when the ERR pin voltage is low. If register OFAF is 0, the device only turns off the failed channel with alive channels diagnostics enabled.

If multiple TPS929160-Q1 devices are used in one application, tying the ERR pins together achieves the one-fails-all-fail behavior in FAIL-SAFE states without master controlling. Any one of TPS929160-Q1 reports fault by pulling the ERR pin to low, and the low voltage on ERR bus is detected by other TPS929160-Q1 as Figure 6-10 illustrated. If the register OFAF is set to 1 for all TPS929160-Q1 devices having the ERR pins tied together, all TPS929160-Q1 devices turn off current for all output channels.

Figure 6-10 ERR Internal Block Diagram