The input pins of the TPS7H60x3-SP are PWM_LI and EN_HI. Each of these pins has an internal pull-down resistance of approximately 200 k? (typical). The functions of these pins vary depending on the selected mode of operation of the gate driver as described in Device Functional Modes. In PWM mode, PWM_LI serves as the input pin for the single PWM control signal into the driver and EN_HI is an enable pin for the driver. In independent input mode, PWM_LI serves as the low-side input and EN_HI serves as the high-side input. The inputs are capable of withstanding voltages up to 14 V, which allows them to be directly connected to the outputs of an analog PWM controller with a power supply voltage less than or equal to 14 V. If operating in independent input mode and either of the two input channels PWM_LI or EN_HI is not used, it is recommended to connect the input to AGND. Given that the inputs are edge-triggered, it is recommended to use input signals with slew rates faster than 2 V/μs for expected operation.

The TPS7H60x3-SP contains split outputs on both the high-side and low-side. The high-side consists of outputs HOH and HOL, which are the source and sink outputs, respectively. Likewise, the low-side has source output LOH and sink output LOL. These split outputs offer the flexibility to adjust the turn-on and turn-off speed independently by placing additional impedance to either the turn-on or turn-off path of the GaN device that is being driven. These outputs are capable of sourcing 1.3 A and sinking 2.5 A, typical.