ZHCSPL6 January 2022 TPS7H4003-SEP
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 VIN and Power VIN Pins (VIN and PVIN)
- 7.3.2 Voltage Reference
- 7.3.3 Adjusting the Output Voltage
- 7.3.4 Safe Start-Up Into Prebiased Outputs
- 7.3.5 Error Amplifier
- 7.3.6 Enable and Adjust UVLO
- 7.3.7 Adjustable Switching Frequency and Synchronization (SYNC)
- 7.3.8 Soft-Start (SS/TR)
- 7.3.9 Power Good (PWRGD)
- 7.3.10 Sequencing
- 7.3.11 Output Overvoltage Protection (OVP)
- 7.3.12 Overcurrent Protection
- 7.3.13 Thermal Shutdown
- 7.3.14 Turn-On Behavior
- 7.3.15 Slope Compensation
- 7.3.16 Small Signal Model for Frequency Compensation
- 7.4 Device Functional Modes
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Operating Frequency
- 8.2.2.2 Output Inductor Selection
- 8.2.2.3 Output Capacitor Selection
- 8.2.2.4 Output Schottky Diode
- 8.2.2.5 Input Capacitor Selection
- 8.2.2.6 Soft-Start Capacitor Selection
- 8.2.2.7 Undervoltage Lockout (UVLO) Set Point
- 8.2.2.8 Output Voltage Feedback Resistor Selection
- 8.2.2.9 Compensation Component Selection
- 8.2.3 Parallel Operation
- 8.2.4 Application Curve
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
7.3.8 Soft-Start (SS/TR)
The device uses the lower voltage of the internal voltage reference or the SS/TR pin voltage as the reference voltage and regulates the output accordingly. A CSS capacitor on the SS/TR pin to GND implements a soft-start time. Equation 5 shows the equation for the nominal soft-start time, tSS. This is the time it will take VOUT to go from 10% to 90% of the programmed voltage. The voltage reference (VREF) is 0.605 V and the soft-start charge current (ISS) is 2.5 μA. When calculating the soft-start time tSS, it is important to take into account the variation of the parameters CSS, VREF and ISS as these may cause tSS to deviate from the nominal value in the actual implementation.
When any of the following four scenarios occur the SS/TR pin is discharged:
- the input UVLO is triggered,
- the EN pin is pulled below 1.05 V,
- the high-side switch current limit threshold is exceeded, or
- a thermal shutdown event occurs.
With the exception of the scenario where the high-side current limit threshold is exceeded, the device will then stop switching and enter into low current operation. At the subsequent power-up, when the shutdown condition is removed, the device does not start switching until it has discharged its SS/TR pin to ground ensuring proper soft-start behavior.
The device will enter into a pulse-skipping mode during start-up in the event that VSENSE is greater than the voltage at the SS/TR pin. During this period, the high-side switch will remain off and the low-side switch will remain on until VSENSE again falls below the voltage at SS/TR.