ZHCSOS3F August 2021 – March 2024 TPS7H2211-SEP , TPS7H2211-SP
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Device Options
- 5 Related Products
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Electrical Characteristics: All Devices
- 7.6 Electrical Characteristics: CFP and KGD Options
- 7.7 Electrical Characteristics: HTSSOP Option
- 7.8 Switching Characteristics: All Devices
- 7.9 Quality Conformance Inspection
- 7.10 Typical Characteristics
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Application and Implementation
- 11Device and Documentation Support
- 12Revision History
- 13Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- DAP|32
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- DAP|32
訂購信息
9.3.2 Current Limit
There is an internal current limit intended to protect the TPS7H2211 against hard short circuit conditions. Figure 9-4 shows a short circuit condition followed by an immediate recovery. The TPS7H2211 internal short circuit protection trips at IL_trip. It takes time tftr, for the internal circuitry to respond to the short circuit condition. Before the current limit circuitry responds, the current through the switch will continue to rise to a peak value, IL_peak. At this point the current limit circuitry responds and quickly turns off the switch. As there is no active discharge on VOUT, the rate of discharge will depend on external factors such as the short condition and COUT. The switch will stay off for time tfto, before turning-on again.
- IL_trip(typ) = 8.5 A
- tftr(typ) = 2.3 μs
- IL_peak(typ) = 25 A
- tfto(typ) = 51 μs
As shown in Figure 9-4, the TPS7H2211 is designed to quickly respond to a hard fault condition to minimize the current peak. IL_trip and tftr are highly dependent upon the actual fault conditions.
While Figure 9-4 shows a hard short condition that immediately recovers, Figure 9-5 shows a hard short condition that does not immediately recover. Instead, the device twice enters the fast trip mode before the fault is removed.
Figure 9-5 Two Hard Shorts
and Recovery