ZHCST52A September 2023 – November 2023 TPS7B4256-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3 Feature Description
- 6.4 Device Functional Modes
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
- DDA|8
訂購信息
6.3.6 Output Short to Battery
When the output is shorted to the battery (see Figure 6-6), the TPS7B4256-Q1 survives and no damage occurs to the device. A short to the battery can also occur when the device is powered by an isolated supply (see Figure 6-7) at a lower voltage. In this case, the TPS7B4256-Q1 supply input voltage is set at 7 V when a short to battery (14 V typical) occurs on VOUT, which typically runs at 5 V. The back-to-back PMOS topology helps limit the continuous reverse current flowing through VIN to IREV, as provided in the Electrical CharacteristicsElectrical CharacteristicsElectrical CharacteristicsElectrical Characteristics table.
Figure 6-6 Output
Voltage Short to Battery
Figure 6-7 Output
Voltage Higher Than the Input