ZHCSGH9 June 2017 TPS7A90
PRODUCTION DATA.
| PIN | DESCRIPTION | ||
|---|---|---|---|
| NAME | NO. | I/O | |
| EN | 7 | I | Enable pin. This pin turns the LDO on and off. If VEN ≥ VIH(EN), the regulator is enabled. If VEN ≤ VIL(EN), the regulator is disabled. The EN pin must be connected to IN if the enable function is not used. |
| FB | 3 | I | Feedback pin. This pin is the input to the control loop error amplifier and is used to set the output voltage of the device. |
| GND | 4 | — | Device GND. Connect to the device thermal pad. |
| IN | 9, 10 | I | Input pin. A 10-µF or greater input capacitor is required. |
| NR/SS | 8 | — | Noise reduction pin. Connect this pin to an external capacitor to bypass the noise generated by the internal band-gap reference. The capacitor reduces the output noise to very low levels and sets the output ramp rate to limit in-rush current. |
| OUT | 1, 2 | O | Regulated output. A 10-µF or greater capacitor must be connected from this pin to GND for stability. |
| PG | 5 | O | Open-drain, power-good indicator pin for the LDO output voltage. A 10-kΩ to 100-kΩ external pullup resistor is required. This pin can be left floating or connected to GND if not used. |
| SS_CTRL | 6 | I | Soft-start control pin. Connect this pin either to GND or IN to change the NR/SS capacitor charging current. If a CNR/SS capacitor is not used, SS_CTRL must be connected to GND to avoid output overshoot. |
| Thermal pad | Pad | — | Connect the thermal pad to the printed circuit board (PCB) ground plane. For an example layout, see Figure 42. |