The TPS7A53B is designed and characterized for operation with ceramic capacitors of 47μF or greater (22μF or greater of capacitance) at the output and 10μF or greater (5μF or greater of capacitance) at the input. Use at least a 47μF capacitor at the input to minimize input impedance. Place the input and output capacitors as near as practical to the respective input and output pins to minimize trace parasitics. If the trace inductance from the input supply to the TPS7A53B is high, a fast current transient can cause V_IN to ring above the absolute maximum voltage rating and damage the device. This situation can be mitigated by additional input capacitors to dampen and keep the ringing below the device absolute maximum ratings.

A combination of multiple output capacitors boosts the high-frequency PSRR. The combination of one 0805-sized, 47μF ceramic capacitor in parallel with two 0805-sized, 10μF ceramic capacitors with a sufficient voltage rating (in conjunction with the PSRR boost circuit) optimizes PSRR for the frequency range of 400kHz to 700kHz, a typical range for dc/dc supply switching frequency. This 47μF || 10μF || 10μF capacitor combination also makes certain that at high input voltage and high output voltage configurations, the minimum effective capacitance is met. Many 0805-sized, 47μF ceramic capacitors have a voltage derating of approximately 60% to 80% at 5.0V, so the addition of the two 10μF capacitors makes sure that the capacitance is at or above 22μF.