ZHCS516B December 2011 – November 2018 TPS7A4101
PRODUCTION DATA.
To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for IN and OUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should connect directly to the GND pin of the device.
Equivalent series inductance (ESL) and ESR must be minimized to maximize performance and ensure stability. Every capacitor (CIN, COUT, CBYP) must be placed as close as possible to the device and on the same side of the PCB as the regulator itself.
Do not place any of the capacitors on the opposite side of the PCB from where the regulator is installed. The use of vias and long traces is strongly discouraged because they may impact system performance negatively and even cause instability.
If possible, and to ensure the maximum performance denoted in this product data sheet, use the same layout pattern used for TPS7A4101 evaluation board, available at www.ti.com.